Inter-integrated circuit (I2C) interface
34
Inter-integrated circuit (I2C) interface
34.1
Introduction
2
The I
C (inter-integrated circuit) bus interface handles communications between the
microcontroller and the serial I
bus-specific sequencing, protocol, arbitration and timing. It supports Standard-mode (Sm),
Fast-mode (Fm) and Fast-mode Plus (Fm+).
It is also SMBus (system management bus) and PMBus (power management bus)
compatible.
DMA can be used to reduce CPU overload.
34.2
I2C main features
2
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I
C bus specification rev03 compatibility:
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1-byte buffer with DMA capability
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Programmable analog and digital noise filters
1050/1454
2
Slave and master modes
Multimaster capability
Standard-mode (up to 100 kHz)
Fast-mode (up to 400 kHz)
Fast-mode Plus (up to 1 MHz)
7-bit and 10-bit addressing mode
Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
All 7-bit addresses acknowledge mode
General call
Programmable setup and hold times
Easy to use event management
Optional clock stretching
Software reset
C bus. It provides multimaster capability, and controls all I
RM0453 Rev 2
RM0453
2
C
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