ST STM32WL55JC Reference Manual page 1047

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Bit 2 CTAMP3F: Clear TAMP3 detection flag
Bit 1 CTAMP2F: Clear TAMP2 detection flag
Bit 0 CTAMP1F: Clear TAMP1 detection flag
Writing 1 in this bit clears the TAMP3F bit in the TAMP_SR register.
Writing 1 in this bit clears the TAMP2F bit in the TAMP_SR register.
Writing 1 in this bit clears the TAMP1F bit in the TAMP_SR register.
Tamper and backup registers (TAMP)
RM0453 Rev 2
1047/1454
1049

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