ST STM32WL55JC Reference Manual page 1032

Real-time clock (RTC)
Offset Register
RTC_ALRMAR
0x40
Reset value 0
RTC_
ALRMASSR
0x44
Reset value 0
RTC_ALRMBR
0x48
Reset value 0
RTC_
ALRMBSSR
0x4C
Reset value 0
RTC_SR
0x50
Reset value
RTC_MISR
0x54
Reset value
RTC_SCR
0x5C
Reset value
RTC_
ALRABINR
0x70
Reset value 0
RTC_
ALRBBINR
0x74
Reset value 0
Refer to
1032/1454
Table 215. RTC register map and reset values (continued)
DT
DU[3:0]
[1:0]
0 0 0 0 0 0 0 0
MASKSS
[5:0]
0 0 0 0 0 0
DT
DU[3:0]
[1:0]
0 0 0 0 0 0 0 0
MASKSS
[5:0]
0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Section 2.6 on page 70
HT
HU[3:0] MNT[2:0]
[1:0]
0 0 0 0 0 0 0 0 0
0
HT
HU[3:0] MNT[2:0]
[1:0]
0 0 0 0 0 0 0 0 0
0
SS[31:0]
0 0 0 0 0 0 0 0 0
SS[31:0]
0 0 0 0 0 0 0 0 0
for the register boundary addresses.
RM0453 Rev 2
MNU[3:0] ST[2:0]
0 0 0 0 0 0 0 0 0
SS[14:0]
0 0 0 0 0 0 0 0 0
MNU[3:0] ST[2:0]
0 0 0 0 0 0 0 0 0
SS[14:0]
0 0 0 0 0 0 0 0 0
0 0
0 0
0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
RM0453
SU[3:0]
0 0 0 0 0
0 0 0 0 0
SU[3:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0