ST STM32WL55JC Reference Manual page 1009

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
32.5
RTC interrupts
The interrupt channel is set in the masked interrupt status register. The interrupt output is
also activated.
Interrupt
Interrupt event
acronym
Alarm A
Alarm B
RTC
Timestamp
Wakeup timer
interrupt
SSR underflow
1. The event flags are in the RTC_SR register.
2. The interrupt masked flags (resulting from event flags AND enable control bits) are in the RTC_MISR register.
3. Wakeup from Stop and Standby modes is possible only when the RTC clock source is LSE or LSI.
4. Wakeup from Shutdown modes is possible only when the RTC clock source is LSE.
Table 214. Interrupt requests
Event
Enable
(1)
flag
control bit
ALRAF
ALRAIE
ALRBF
ALRBIE
TSF
TSIE
WUTF
WUTIE
SSRUF
SSRUIE
RM0453 Rev 2
Interrupt
Exit from
clear
Sleep
(2)
method
mode
write 1 in
Yes
CALRAF
write 1 in
Yes
CALRBF
write 1 in
Yes
CTSF
write 1 in
Yes
CWUTF
write 1 in
Yes
CSSRUF
Real-time clock (RTC)
Exit from
Exit from
Stop and
Shutdown
Standby
mode
mode
(3)
(4)
Yes
Yes
(3)
(4)
Yes
Yes
(3)
(4)
Yes
Yes
(3)
(4)
Yes
Yes
(3)
(4)
Yes
Yes
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