ST STM32G4 Series Reference Manual page 2045

Advanced arm-based 32-bit mcus
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RM0440
Note:
When the APB bridge write buffer is full, it takes one extra APB cycle when writing the
AFIO_MAPR register. This is because the deactivation of the JTAGSW pins is done in two
cycles to guarantee a clean level on the nTRST and TCK input signals of the core.
Cycle 1: the JTAGSW input signals to the core are tied to 1 or 0 (to 1 for nTRST, TDI
and TMS, to 0 for TCK)
Cycle 2: the GPIO controller takes the control signals of the SWJTAG IO pins (like
controls of direction, pull-up/down, Schmitt trigger activation, etc.).
46.4.3
Internal pull-up and pull-down on JTAG pins
It is necessary to ensure that the JTAG input pins are not floating since they are directly
connected to flip-flops to control the debug mode features. Special care must be taken with
the SWCLK/TCK pin which is directly connected to the clock of some of these flip-flops.
To avoid any uncontrolled IO levels, the device embeds internal pull-ups and pull-downs on
the JTAG input pins:
NJTRST: internal pull-up
JTDI: internal pull-up
JTMS/SWDIO: internal pull-up
TCK/SWCLK: internal pull-down
Once a JTAG IO is released by the user software, the GPIO controller takes control again.
The reset states of the GPIO control registers put the I/Os in the equivalent state:
NJTRST: input pull-up
JTDI: input pull-up
JTMS/SWDIO: input pull-up
JTCK/SWCLK: input pull-down
JTDO: input floating
The software can then use these I/Os as standard GPIOs.
Note:
The JTAG IEEE standard recommends to add pull-ups on TDI, TMS and nTRST but there is
no special recommendation for TCK. However, for JTCK, the device needs an integrated
pull-down.
Having embedded pull-ups and pull-downs removes the need to add external resistors.
The NJTRST (PB4) pin has also UCPD_CC2 functionality which implements internal UCPD
pull-down resistor (5.1 KΩ) which is controlled by voltage on UCPD_DBCC2 pin (PA10). to
disable the pull-down on the NJTRST (PB4) pin the UCPD_DBCC2 pin (PA10) must be held
at low level voltage (see
Section 45.4.6: UCPD Type-C pull-ups (Rp) and pull-downs
RM0440 Rev 1
Debug support (DBG)
(Rd)).
2045/2083
2073

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