Stack Operation For Interrupt Handling; Fig. 6.20 Stack Operation At Starting Interrupt Handling - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

6.8 Stack Operation for Interrupt Handling

When an interrupt is accepted, the values of the dedicated registers are saved automatically in the system
stack before branching to the interrupt handling. At interrupt handling termination, the dedicated registers
are also returned from the stack automatically.
n Stack operation at starting interrupt handling
When an interrupt is accepted, the CPU automatically saves the values of the current dedicated registers in
the system stack in the following order.
(1) Accumulator (A)
(2) Direct page register (DPR)
(3) Additional data bank register (ADB)
(4) Data bank register (DTB)
(5) Program bank register (PCB)
(6) Program counter (PC)
(7) Processor status (PS)
Figure 6.20 shows the stack operation at starting interrupt handling.
Just before interrupt
SSB
00
H
SSP 08FE
H
A 0000
08FE
H
AH
DPR 01 ADB
H
DTB
00 PCB
H
PC
803F
H
PS
20E0
H
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
Address Memory
08FF
H
08FE
H
XX
H
H
XX
H
XX
H
H
XX
H
AL
XX
H
00 XX
H
H
XX
H
FF
XX
H
H
XX
H
XX
H
XX
H
L
08F2 XX
H H
Byte

Fig. 6.20 Stack Operation at Starting Interrupt Handling

Just after interrupt
SSB 00
H
SP
SSP 08F2
H
A 0000
H
AH
DPR 01
H
DTB 00
H
PC 803F
H
PS 20E0
H
6-34
Address Memory
08FF
H
08FE
H
00
H
00
H
08
08FE
H H
FE
AL
H
01
H
ADB 00
H
00
H
00
H
PCB FF
H
FF
H
80
H
3F
H
20
H
08F2 E0
H H
Byte
SP
AH
AL
DPR
ADB
DTB
PCB
PC
PS
SP after
updating