Reset Factors And Oscillation Stabilization Wait Times - Fujitsu F2MC-16LX Hardware Manual

16-bit microcontroller mb90330 series
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CHAPTER 4 RESET
4.2

Reset Factors and Oscillation Stabilization Wait Times

There are four kinds of reset factors of MB90330 series. The oscillation stabilization
wait time varies with the reset cause.
Reset Factors and Oscillation Stabilization Wait Times
Table 4.2-1 shows the relationship between the reset causes and the oscillation stabilization wait time.
Table 4.2-1 Reset Factors and Oscillation Stabilization Wait Times
Reset factor
Power on reset
Watchdog timer
External reset from RST terminal
Software reset
HCLK: Oscillation clock
WS1, WS0: Bits used to select the oscillation stabilization wait time of the clock selection register (CKSCR).
Figure 4.2-1 shows the oscillation stabilization wait times for the evaluation/flash and MASK products
during power on reset time.
116
Oscillation stabilization wait time
Each value in parentheses ( ) represents the period for the oscillation clock at
6 MHz.
Evaluation products/flash products: 2
17
MASK product: 2
/HCLK (about 21.85 ms).
None: However, WS1 and WS0 bit are initialized by "11
None: However, WS1 and WS0 bit are initialized by "11
None: However, WS1 and WS0 bit are initialized by "11
18
/HCLK (about 43.70 ms).
".
B
".
B
".
B

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