Epa And Timer/Counter Signals And Registers - Intel 8XC196K Series User Manual

8XC196K x , J x , CA USER'S MANUAL
Timer-Counter Unit
EPA 3:0
8XC196K x Only
EPA7:4
EPA8 / COMP0
EPA9 / COMP1

10.2 EPA AND TIMER/COUNTER SIGNALS AND REGISTERS

Table 10-2 describes the EPA and timer/counter input and output signals. Each signal is multi-
plexed with a port pin as shown in the first column. Table 10-3 briefly describes the registers for
the EPA capture/compare channels, EPA compare-only channels, and timer/counters.
10-2
TIMER1
TIMER2
Capture/Compare
Channel 0–3
Capture/Compare
Channel 4–7
Capture/Compare
Channel 8
Compare-only
Channel 0
Capture/Compare
Channel 9
Compare-only
Channel 1
Figure 10-1. EPA Block Diagram
EPA 3:0 Interrupts
Indirect
Interrupt
Processor
Logic
EPA x
Interrupt
A3114-01