Standard Input-Only Port Considerations - Intel 8XC196K Series User Manual

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Internal Bus
Buffer
Read Port
6.2.2

Standard Input-only Port Considerations

Port 0 pins are unique in that they may individually be used as digital inputs and analog inputs at
the same time. However, reading the port induces noise into the A/D converter, decreasing the
accuracy of any conversion in progress. We strongly recommend that you not read the port while
an A/D conversion is in progress. To reduce noise, the P0_PIN register is clocked only when the
port is read.
These port pins are powered by the analog reference voltage (V
pins. If the port pins are to function as either analog or digital inputs, the V
must provide power. If the voltage applied to the analog input exceeds V
than 0.5 volts, current will be driven through Q1 or Q2 into the reference circuitry, decreasing the
accuracy of all analog conversions.
The port pin is sampled one state time before the read buffer is enabled. Sampling occurs during
phase 1 (while CLKOUT is low) and resolves the value of the pin before it is presented to the
internal bus. To ensure that the value is recognized, it must be valid 45 ns before the rising edge
of CLKOUT and must remain valid until CLKOUT falls. If the pin value changes during the sam-
ple time, the new value may or may not be recorded.
As a digital input, a pin acts as a high-impedance input. However, as an analog input, a pin must
provide current for a short time to charge the internal sample capacitor when a conversion begins.
This means that if a conversion is taking place on a port pin, its input characteristics change mo-
mentarily.
Vcc
PORT 0
Level
Data Register
Translation
Buffer
P0_PIN
Q
D
LE
PH1 Clock
Vss
Figure 6-1. Standard Input-only Port Structure
V
REF
To Analog MUX
150 to 200 Ohms
R1
Q3
Vss
Vss
ANGND
) and analog ground (ANGND)
REF
I/O PORTS
V
REF
Q1
Input Pin
Q2
ANGND
A0236-01
and ANGND pins
REF
or ANGND by more
REF
6-3

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