Intel 8XC196K Series User Manual page 321

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8XC196K x , J x , CA USER'S MANUAL
The CAN controller synchronizes itself to the CAN bus by waiting for 128 bus idle states (128
occurrences of 11 consecutive recessive bits) before participating in bus activities. During this se-
quence, the CAN controller writes a bit 0 error code to the LEC2:0 bits of the status register each
time it receives a recessive bit. Software can check the status register to determine whether the
CAN bus is stuck in a dominant state. Once the CAN controller is resynchronized with the CAN
bus, it clears the BUSOFF bit and starts transferring messages again.
12-42

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