Security Features - Intel 8XC196K Series User Manual

Table of Contents

Address Range (Hex)

9FFF (KT, JT, CA)

5FFF (KR, JR)

4FFF (KQ, JQ)

Intel manufacturing uses this location to determine whether to

program the OFD bit. Customers with QROM or MROM codes who

desire oscillator failure detection should equate this location to the

value 0CDEH.

16.3 SECURITY FEATURES

Several security features enable you to control access to both internal and external memory. Read

and write protection bits in the chip configuration register (CCR0), combined with a security key,

allow various levels of internal memory protection. Two UPROM bits disable fetches of instruc-

tions and data from external memory. An additional bit enables circuitry that can detect an oscil-

lator failure and cause a device reset. (See Figure 16-1 on page 16-7 for more information.)

Table 16-2. 87C196K x OTPROM Memory Map

Program memory

Reserved (each location must contain FFH)

Upper interrupt vectors

Security key

Reserved (each location must contain FFH)

Reserved (must contain 20H)

Reserved (must contain 20H)

OFD flag for QROM or MROM codes

Reserved (each location must contain FFH)

Lower interrupt vectors

PROGRAMMING THE NONVOLATILE MEMORY