Enabling The Serial Port Interrupts - Intel 8XC196K Series User Manual

8XC196K x , J x , CA USER'S MANUAL
For mode 0 receptions, the BAUD_VALUE must be 0002H or greater.
Otherwise, the resulting data in the receive shift register will be incorrect.
The reason for this restriction is that the receive shift register is clocked from
an internal signal rather than the signal on TXD. Although these two signals
are normally synchronized, the internal signal generates one clock before the
first pulse transmitted by TXD and this first clock signal is not synchronized
with TXD. This clock signal causes the receive shift register to shift in
whatever data is present on the RXD pin. This data is treated as the least-
significant bit (LSB) of the reception. The reception then continues in the
normal synchronous manner, but the data received is shifted left by one bit
because of the false LSB. The seventh data bit transmitted is received as the
most-significant bit (MSB), and the transmitted MSB is never shifted into the
receive shift register.
Using XTAL1 at 16 MHz, the maximum baud rates are 2.76 Mbaud (SP_BAUD = 8002H or
0002H) for mode 0 and 1.0 Mbaud for modes 1, 2, and 3. Table 7-3 shows the SP_BAUD values
for common baud rates when using a 16 MHz XTAL1 clock input. Because of rounding, the
BAUD_VALUE formula is not exact and the resulting baud rate is slightly different than desired.
Table 7-3 shows the percentage of error when using the sample SP_BAUD values. In most cases,
a serial link will work with up to 5.0% difference in the receiving and transmitting baud rates.
Table 7-3. SP_BAUD Values When Using XTAL1 at 16 MHz
Baud Rate
9600
4800
2400
1200
300
NOTE:
1. Bit 15 is always set when XTAL1 is selected as the clock source for the baud-rate generator.
7.4.4

Enabling the Serial Port Interrupts

The serial port has both a transmit interrupt (TI) and a receive interrupt (RI). To enable an inter-
rupt, set the corresponding mask bit in the interrupt mask register (see Table 7-2 on page 7-2) and
execute the EI instruction to globally enable servicing of interrupts. See Chapter 5, "Standard and
PTS Interrupts," for more information about interrupts.
7-12
CAUTION
SP_BAUD Register Value (Note 1)
Mode 0 Mode 1, 2, 3
8340H
8682H
8D04H
9A0AH
E82BH
Mode 0
8067H 0.04
80CFH 0.02
81A0H 0.01
8340H 0
8D04H 0
% Error
Mode 1, 2, 3
0.16
0.16
0.08
0.04
0.01