Table of Contents
Advertisement
4.1.4.1
Reserved Memory Locations ...............................................................................4-4
4.1.4.2
Interrupt and PTS Vectors ....................................................................................4-4
4.1.4.3
Security Key .........................................................................................................4-4
4.1.4.4
Chip Configuration Bytes (CCBs) .........................................................................4-4
4.1.5
Special-function Registers (SFRs) ............................................................................4-5
4.1.5.1
Memory-mapped SFRs ........................................................................................4-5
4.1.5.2
Peripheral SFRs ...................................................................................................4-6
4.1.6
Internal RAM (Code RAM) ......................................................................................4-10
4.1.7
Register File ............................................................................................................4-10
4.1.7.1
General-purpose Register RAM .........................................................................4-12
4.1.7.2
Stack Pointer (SP) ..............................................................................................4-12
4.1.7.3
CPU Special-function Registers (SFRs) .............................................................4-13
4.2
WINDOWING............................................................................................................... 4-13
4.2.1
Selecting a Window ................................................................................................4-14
4.2.2
Addressing a Location Through a Window .............................................................4-17
4.2.2.1
32-byte Windowing Example ..............................................................................4-20
4.2.2.2
64-byte Windowing Example ..............................................................................4-20
4.2.2.3
128-byte Windowing Example ............................................................................4-20
4.2.2.4
Unsupported Locations Windowing Example .....................................................4-21
4.2.2.5
Using the Linker Locator to Set Up a Window ....................................................4-21
4.2.3
Windowing and Addressing Modes .........................................................................4-23
CHAPTER 5
5.1
OVERVIEW ................................................................................................................... 5-1
5.2
INTERRUPT SIGNALS AND REGISTERS ................................................................... 5-3
5.3
INTERRUPT SOURCES AND PRIORITIES.................................................................. 5-4
5.3.1
Special Interrupts ......................................................................................................5-6
5.3.1.1
Unimplemented Opcode ......................................................................................5-6
5.3.1.2
Software Trap .......................................................................................................5-6
5.3.1.3
NMI .......................................................................................................................5-6
5.3.2
External Interrupt Pins ..............................................................................................5-6
5.3.3
Multiplexed Interrupt Sources ...................................................................................5-7
5.3.4
End-of-PTS Interrupts ...............................................................................................5-7
5.4
INTERRUPT LATENCY................................................................................................. 5-7
5.4.1
Situations that Increase Interrupt Latency ................................................................5-8
5.4.2
Calculating Latency ...................................................................................................5-9
5.4.2.1
Standard Interrupt Latency ...................................................................................5-9
5.4.2.2
PTS Interrupt Latency ........................................................................................5-10
5.5
PROGRAMMING THE INTERRUPTS......................................................................... 5-11
5.5.1
Programming the Multiplexed Interrupts .................................................................5-11
5.5.2
Modifying Interrupt Priorities ...................................................................................5-14
5.5.3
Determining the Source of an Interrupt ...................................................................5-16
5.5.3.1
Determining the Source of Multiplexed Interrupts ..............................................5-16
5.6
INITIALIZING THE PTS CONTROL BLOCKS............................................................. 5-18
CONTENTS
v
Advertisement
Table of Contents
