Intel 8XC196K Series User Manual page 647

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Serial I/O port‚ See SIO port
Serial port programming mode, 16-32–16-43
circuit, 16-33
defaults, 16-34, 16-35
functions, 16-32
memory map, 16-34
operation, 16-36
RISM code examples, 16-38
using internal RAM, 16-35
V
voltage, 16-32
PP
See also RISM
SETC instruction, A-3, A-31, A-47, A-53, A-59
SFRs
and powerdown mode, 14-3, 14-4
CPU, 4-13
memory-mapped, 4-5
peripheral, 4-5, 4-6
and windowing, 4-13
reserved, 3-10, 4-5, 4-13
with indirect or indexed operations, 3-10, 4-5,
4-13
with read-modify-write instructions, 4-5
Shift instructions, A-53, A-59
SHL instruction, A-3, A-32, A-42, A-53, A-59
SHLB instruction, A-3, A-32, A-42, A-53, A-59
SHLL instruction, A-3, A-33, A-42, A-53
SHORT-INTEGER, defined, 3-2
SHR instruction, A-3, A-33, A-42, A-53, A-59
SHRA instruction, A-3, A-34, A-42, A-53, A-59
SHRAB instruction, A-3, A-34, A-42, A-53, A-59
SHRAL instruction, A-3, A-35, A-42, A-53, A-59
SHRB instruction, A-3, A-35, A-42, A-53, A-59
SHRL instruction, A-3, A-36, A-42, A-53, A-59
Signals
descriptions, B-8–B-19
functional listings, B-2, B-4, B-6
name changes, B-1
naming conventions, 1-4
Single transfer mode‚ See PTS
SIO port, 2-9, 7-1
9-bit data‚ See mode 2‚ mode 3
block diagram, 7-1, 10-2
calculating baud rate, 7-11, 7-12, C-68
downloading to OTPROM‚ See serial port
programming mode
enabling interrupts, 7-12
enabling parity, 7-8–7-10
framing error, 7-14
Index-12
half-duplex considerations, 7-7
interrupts, 7-6, 7-8, 7-14
mode 0, 7-4–7-5
mode 1, 7-6
mode 2, 7-6, 7-7
mode 3, 7-6, 7-7
multiprocessor communications, 7-7, 7-8
overrun error, 7-14
programming, 7-8
programming mode‚ See serial port
programming mode
receive interrupt (RI) flag, 7-14
receive register‚ See registers, SBUF_RX
received bit 8 (RB8) flag, 7-14
received parity error (RPE) flag, 7-14
receiver, 7-1
selecting baud rate, 7-10–7-12
SFRs, 7-2
signals, 7-2
status, 7-13–7-14
transmit interrupt (TI) flag, 7-14
transmit register‚ See registers, SBUF_TX
transmitter, 7-1
transmitter empty (TXE) flag, 7-14
See also mode 0‚ mode 1‚ mode 2‚ mode 3‚
port 2
SJMP instruction, A-2, A-36, A-42, A-48, A-51,
A-57
SKIP instruction, A-2, A-36, A-42, A-53, A-59
Slave port, 2-10, 9-1–9-16
address/data bus, 9-2
and demultiplexed bus, 9-6
and multiplexed bus, 9-6, 9-11
block diagram, 9-3
code examples
master program, 9-8, 9-11
Port 3 configuration, 9-14
Port 5 configuration, 9-14
SFR initialization, 9-14
slave program, 9-9, 9-12
configuring pins, 9-14
determining status, 9-16
hardware connections, 9-6–9-7
initializing SFRs, 9-14
interrupts, 9-8, 9-16
CBF interrupt, 9-16
IBF interrupt, 9-16
OBE interrupt, 9-16

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