Intel 8XC196K Series User Manual page 8

7.4.3 Programming the Baud Rate and Clock Source .....................................................7-10
7.4.4 Enabling the Serial Port Interrupts ..........................................................................7-12
7.4.5 Determining Serial Port Status ................................................................................7-13
7.5 PROGRAMMING EXAMPLE USING AN INTERRUPT-DRIVEN ROUTINE ............... 7-14
CHAPTER 8
SYNCHRONOUS SERIAL I/O (SSIO) PORT
8.1 SYNCHRONOUS SERIAL I/O (SSIO) PORT FUNCTIONAL OVERVIEW.................... 8-1
8.2 SSIO PORT SIGNALS AND REGISTERS .................................................................... 8-2
8.3 SSIO OPERATION ........................................................................................................ 8-3
8.4 SSIO HANDSHAKING ................................................................................................... 8-6
8.4.1 SSIO Handshaking Configuration .............................................................................8-6
8.4.2 SSIO Handshaking Operation ...................................................................................8-7
8.5 PROGRAMMING THE SSIO PORT .............................................................................. 8-9
8.5.1 Configuring the SSIO Port Pins ................................................................................8-9
8.5.2 Programming the Baud Rate and Enabling the Baud-rate Generator .......................8-9
8.5.3 Controlling the Communications Mode and Handshaking ......................................8-10
8.5.4 Enabling the SSIO Interrupts ..................................................................................8-13
8.5.5 Determining SSIO Port Status ................................................................................8-13
8.6 PROGRAMMING CONSIDERATIONS........................................................................ 8-13
8.7 PROGRAMMING EXAMPLE ....................................................................................... 8-15
CHAPTER 9
SLAVE PORT
9.1 SLAVE PORT FUNCTIONAL OVERVIEW .................................................................... 9-2
9.2 SLAVE PORT SIGNALS AND REGISTERS ................................................................. 9-2
9.3 HARDWARE CONNECTIONS ...................................................................................... 9-6
9.4 SLAVE PORT MODES .................................................................................................. 9-8
9.4.1 Standard Slave Mode Example ................................................................................9-8
9.4.1.1 Master Device Program .......................................................................................9-8
9.4.1.2 Slave Device Program .........................................................................................9-9
9.4.1.3 Demultiplexed Bus Timings ................................................................................9-10
9.4.2 Shared Memory Mode Example (8XC196KS and KT only) ....................................9-11
9.4.2.1 Master Device Program .....................................................................................9-11
9.4.2.2 Slave Device Program .......................................................................................9-12
9.4.2.3 Multiplexed Bus Timings ....................................................................................9-13
9.5 CONFIGURING THE SLAVE PORT............................................................................ 9-14
9.5.1 Programming the Slave Port Control Register (SLP_CON) ....................................9-14
9.5.2 Enabling the Slave Port Interrupts ..........................................................................9-16
9.6 DETERMINING SLAVE PORT STATUS ..................................................................... 9-16
9.7 USING STATUS BITS TO SYNCHRONIZE MASTER AND SLAVE ........................... 9-16
CONTENTS
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