Intel 8XC196K Series User Manual page 304

CAN_MSG x CON0 (Continued)
x = 1–15 (87C196CA)
Program the CAN message object x control 0 (CAN_MSG x CON0) register to indicate whether the
message object is ready to transmit and to control whether a successful transmission or reception
generates an interrupt. The least-significant bit-pair indicates whether an interrupt is pending.
This register consists of four bit-pairs — the most-significant bit of each pair is in true form and the
least-significant bit is in complement form. This format allows software to set or clear any bit with a
single write operation, without affecting the remaining bits.
7
87C196CA MSGVAL
Bit Bit
Number Mnemonic
3:2 RXIE
1:0 INT_PND
Figure 12-14. CAN Message Object x Control 0 (CAN_MSGxCON0) Register (Continued)
CAN SERIAL COMMUNICATIONS CONTROLLER
MSGVAL TXIE TXIE
Receive Interrupt Enable
Transmit message objects do not use this bit-pair.
For a receive message object, set this bit-pair to enable this message
object to initiate a receive (RX) interrupt after a successful reception. You
must also set the interrupt enable bit (CAN_CON.1) to enable the interrupt.
bit 3 bit 2
0 1 no interrupt
1 0 generate an interrupt
Interrupt Pending
This bit-pair indicates that this message object has initiated a transmit (TX)
or receive (RX) interrupt. Software must clear this bit when it services the
interrupt.
bit 1 bit 0
0 1 no interrupt
1 0 an interrupt was generated
Address: 1E x 0H ( x = 1–F)
Reset State: Unchanged
RXIE RXIE INT_PND
Function
0
INT_PND
12-25