15.6.4 Address Valid with Write Strobe Mode
When the address valid with write strobe mode is selected, the device generates the ADV#,
WRL#, and WRH# bus-control signals. This mode is used for a simple system using external 16-
bit RAM. Figure 15-19 shows the timing. The RD# signal (not shown) is similar to WRL#,
WRH#, and WR#. The example system of Figure 15-20 uses address valid with write strobe.
ADV#
WRL#
WRH#
Address
AD15:0
Figure 15-19. Timings of Address Valid with Write Strobe Mode
Valid
Valid
Data Out
16-bit Bus Cycle
INTERFACING WITH EXTERNAL MEMORY
ADV#
WRL#
Addr
AD7:0
Low
Address High
AD15:0
8-bit Bus Cycle
Data Out
A3096-01
15-29