Intel 8XC196K Series User Manual page 496

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Table A-9. Instruction Execution Times (in State Times) (Continued)
Mnemonic
BMOV
BMOVI
Mnemonic
LD
LDB
LDBSE
LDBZE
ST
STB
XCH
XCHB
Mnemonic
BR
LJMP
SJMP
TIJMP
register/register
memory/register
memory/memory
Mnemonic
LCALL
RET
SCALL
TRAP
NOTE: The column entitled "Reg." lists the instruction execution times for accesses to the register file or
peripheral SFRs. The column entitled "Mem." lists the instruction execution times for accesses to
all memory-mapped registers, I/O, or memory. See Table 4-1 on page 4-2 for address information.
Indirect
register/register
6 + 8 per word
memory/register
6 + 11 per word
memory/memory
6 + 14 per word
register/register
7 + 8 per word + 14 per interrupt
memory/register
7 + 11 per word + 14 per interrupt
memory/memory
7 + 14 per word + 14 per interrupt
Direct
Immed.
Normal
Reg.
4
5
5
4
4
5
4
4
5
4
4
5
4
5
4
5
5
5
Jump
Direct
Immed.
Normal
Call (Register)
Direct
Immed.
Normal
16
INSTRUCTION SET REFERENCE
Data
Indirect
Autoinc.
Mem.
Reg.
Mem.
8
6
8
8
6
8
8
6
8
8
6
8
8
6
9
8
6
8
Indirect
Autoinc.
7
7
15
18
21
Indirect
Autoinc.
11
Indexed
Short
Long
Reg.
Mem.
Reg.
Mem.
6
9
7
10
6
9
7
10
6
9
7
10
6
9
7
10
6
9
7
10
6
9
7
10
8
13
9
14
8
13
9
14
Indexed
Short
Long
7
7
Indexed
Short
Long
11
11
A-57

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