Special-Function Registers (Sfrs); Memory-Mapped Sfrs - Intel 8XC196K Series User Manual

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Special-function Registers (SFRs)

These devices have both memory-mapped SFRs and peripheral SFRs. The memory-mapped

SFRs must be accessed using indirect or indexed addressing modes, and they cannot be win-

dowed. The peripheral SFRs are physically located in the on-chip peripherals, and they can be

windowed (see "Windowing" on page 4-13). Do not use reserved SFRs; write zeros to them or

leave them in their default state. When read, reserved bits and reserved SFRs return undefined

Using any SFR as a base or index register for indirect or indexed operations

can cause unpredictable results. External events can change the contents of

SFRs, and some SFRs are cleared when read. For this reason, consider the

implications of using an SFR as an operand in a read-modify-write instruction

(e.g., XORB).

Locations 1FE0–1FFFH contain memory-mapped SFRs (see Table 4-3). Locations in this range

that are omitted from the table are reserved. The memory-mapped SFRs must be accessed with

indirect or indexed addressing modes, and they cannot be windowed. If you read a location in this

range through a window, the SFR appears to contain FFH (all ones). If you write a location in

this range through a window, the write operation has no effect on the SFR.

The memory-mapped SFRs are accessed through the memory controller, so instructions that op-

erate on these SFRs execute as they would from external memory with zero wait states.

Table 4-3. Memory-mapped SFRs

Ports 3, 4, 5, Slave Port, UPROM SFRs

High (Odd) Byte

MEMORY PARTITIONS

Low (Even) Byte