Intel 8XC196MC Manuals

Manuals and User Guides for Intel 8XC196MC. We have 1 Intel 8XC196MC manual available for free PDF download: User Manual

Intel 8XC196MC User Manual (579 pages)

Brand: Intel | Category: Microcontrollers | Size: 2 MB

Table of Contents
6
Guide to this Manual
22
Manual Contents
24
Notational Conventions and Terminology
26
Related Documents
28
World Wide Web
34
Technical Support
34
Product Literature
34
Architectural Overview
36
Typical Applications
38
Microcontroller Features
38
Functional Overview
39
CPU Control
41
Register File
41
Register Arithmetic-Logic Unit (RALU)
41
Code Execution
42
Instruction Format
42
Memory Interface Unit
43
Interrupt Service
43
Internal Timing
44
Internal Peripherals
45
I/O Ports
46
Serial I/O (SIO) Port
46
Event Processor Array (EPA) and Timer/Counters
47
Pulse-Width Modulator (PWM)
47
Frequency Generator
47
Waveform Generator
47
Analog-To-Digital Converter
48
Watchdog Timer
48
Special Operating Modes
48
Reducing Power Consumption
48
Testing the Printed Circuit Board
48
Programming the Nonvolatile Memory
49
Programming Considerations
50
Overview of the Instruction Set
52
BIT Operands
53
BYTE Operands
53
SHORT-INTEGER Operands
53
WORD Operands
53
INTEGER Operands
54
DOUBLE-WORD Operands
54
LONG-INTEGER Operands
55
Converting Operands
55
Conditional Jumps
55
Floating Point Operations
55
Addressing Modes
56
Direct Addressing
57
Immediate Addressing
57
Indirect Addressing
57
Indirect Addressing with Autoincrement
58
Indirect Addressing with the Stack Pointer
58
Indexed Addressing
58
Short-Indexed Addressing
58
Long-Indexed Addressing
59
Zero-Indexed Addressing
59
Assembly Language Addressing Mode Selections
60
Direct Addressing
60
Indexed Addressing
60
Software Standards and Conventions
60
Using Registers
60
Addressing 32-Bit Operands
61
Linking Subroutines
61
Software Protection Features and Guidelines
62
Memory Partitions Memory Partitions
64
External Devices (Memory or I/O)
66
Program and Special-Purpose Memory
66
Program Memory
67
Special-Purpose Memory
68
Reserved Memory Locations
68
Interrupt and PTS Vectors
68
Security Key
69
Chip Configuration Bytes (Ccbs)
69
Special-Function Registers (Sfrs)
69
Memory-Mapped Sfrs
70
Peripheral Sfrs
70
Register File
74
General-Purpose Register RAM
74
Stack Pointer (SP)
75
CPU Special-Function Registers (Sfrs)
76
Windowing
77
Selecting a Window
78
Addressing a Location through a Window
79
32-Byte Windowing Example
81
Unsupported Locations Windowing Example
81
Using the Linker Locator to Set up a Window
82
Windowing and Addressing Modes
84
Standard and Pts Interrupts
86
Overview of Interrupts
88
Interrupt Signals and Registers
90
Interrupt Sources and Priorities
91
Special Interrupts
93
Unimplemented Opcode
93
Software Trap
93
Nmi
93
External Interrupt Pin
93
Multiplexed Interrupt Sources
94
End-Of-PTS Interrupts
96
Interrupt Latency
96
Situations that Increase Interrupt Latency
96
Calculating Latency
97
Standard Interrupt Latency
97
PTS Interrupt Latency
98
Programming the Interrupts
99
Modifying Interrupt Priorities
105
Determining the Source of an Interrupt
107
Initializing the Pts Control Blocks
111
Specifying the PTS Count
112
Selecting the PTS Mode
114
Single Transfer Mode
114
Block Transfer Mode
117
A/D Scan Mode
119
A/D Scan Mode Cycles
122
A/D Scan Mode Example 1
122
A/D Scan Mode Example 2
124
Synchronous SIO Transmit Mode Example
130
Synchronous SIO Receive Mode Example
134
Asynchronous SIO Transmit Mode Example
137
Asynchronous SIO Receive Mode Example
142
I/O Ports Overview
148
Input-Only Ports 1 (MC, MD Only) and 0
149
Standard Input-Only Port Operation
150
Standard Input-Only Port Considerations
151
Bidirectional Ports 1 (Mh Only), 2, 5, and 7 (MD Only)
151
Bidirectional Port Operation
153
Bidirectional Port Pin Configurations
156
Bidirectional Port Pin Configuration Example
158
Bidirectional Port Considerations
159
Bidirectional Ports 3 and 4 (Address/Data Bus)
161
Bidirectional Ports 3 and 4 (Address/Data Bus) Operation
162
Using Ports 3 and 4 as I/O
163
Standard Output-Only Port 6
163
Output-Only Port Operation
164
Configuring Output-Only Port Pins
164
Serial I/O (Sio) Port
168
Serial I/O (Sio) Port Functional Overview
170
Serial I/O Port Signals and Registers
171
Serial Port Modes
173
Synchronous Modes (Modes 0 and 4)
174
Mode 0
174
Mode 4
175
Asynchronous Modes (Modes 1, 2, and 3)
176
Mode 1
176
Mode 2
177
Mode 3
178
Mode 2 and 3 Timings
178
Multiprocessor Communications
178
Programming the Serial Port
179
Configuring the Serial Port Pins
179
Programming the Control Register
179
Programming the Baud Rate and Clock Source
181
Enabling the Serial Port Interrupts
183
Determining Serial Port Status
184
Frequency Generator
186
Functional Overview
188
Programming the Frequency Generator
190
Configuring the Output
190
Programming the Frequency
190
Determining the Current Value of the Down-Counter
191
Application Example
191
Waveform Generator
198
Waveform Generator Functional Overview
200
Waveform Generator Signals and Registers
202
Waveform Generator Operation
203
Timebase Generator
203
Phase Driver Channels
204
Control and Protection Circuitry
204
Register Buffering and Synchronization
205
Operating Modes
206
Center-Aligned Modes
208
Edge-Aligned Modes
209
Programming the Waveform Generator
211
Configuring the Outputs
211
Controlling the Protection Circuitry and EXTINT Interrupt Generation
214
Specifying the Carrier Period and Duty Cycle
215
Specifying the Operating Mode and Dead Time and Starting the Counter
216
Determining the Waveform Generator's Status
218
Enabling the Waveform Generator Interrupts
218
Design Considerations
219
Dead Time and Duty Cycle
219
EXTINT Interrupts and Protection Circuitry
220
Programming Example
220
Pulse-Width Modulator
226
Pwm Functional Overview
228
Pwm Signals and Registers
229
Pwm Operation
230
Programming the Frequency and Period
231
Programming the Duty Cycle
233
Sample Calculations
234
Reading the Current Value of the Down-Counter
234
Enabling the PWM Outputs
235
Generating Analog Outputs
237
Event Processor Array (Epa)
238
Epa Functional Overview
240
Epa and Timer/Counter Signals and Registers
241
Timer/Counter Functional Overview
244
Cascade Mode (Timer 2 Only)
246
Quadrature Clocking Modes
246
Epa Channel Functional Overview
248
Operating in Capture Mode
249
EPA Overruns
251
Preventing EPA Overruns
252
Operating in Compare Mode
252
Generating a Low-Speed PWM Output
252
Generating the Highest-Speed PWM Output
253
Programming the Epa and Timer/Counters
254
Configuring the EPA and Timer/Counter Signals
254
Programming the Timers
254
Programming the Capture/Compare Channels
257
Programming the Compare-Only Channels
261
Enabling the Epa Interrupts
262
Determining Event Status
263
Analog-To-Digital (A/D) Converter
264
A/D Converter Functional Overview
266
A/D Converter Signals and Registers
267
A/D Converter Operation
268
Programming the A/D Converter
269
Programming the A/D Test Register
270
Programming the A/D Result Register (for Threshold Detection Only)
270
Programming the A/D Time Register
271
Programming the A/D Command Register
272
Enabling the A/D Interrupt
273
Determining A/D Status and Conversion Results
274
Design Considerations
275
Designing External Interface Circuitry
275
Minimizing the Effect of High Input Source Resistance
276
Suggested A/D Input Circuit
277
Analog Ground and Reference Voltages
277
Using Mixed Analog and Digital Inputs
278
Understanding A/D Conversion Errors
278
Minimum Hardware Considerations
284
Minimum Connections
286
Unused Inputs
287
I/O Port Pin Connections
287
Applying and Removing Power
289
Noise Protection Tips
289
The On-Chip Oscillator Circuitry
290
Using an External Clock Source
292
Resetting the Device
293
Generating an External Reset
295
Issuing the Reset (RST) Instruction
297
Issuing an Illegal IDLPD Key Operand
297
Generating Wait States
297
Enabling the Watchdog Timer
297
Special Operating Modes
300
Special Operating Mode Signals and Registers
302
Reducing Power Consumption
304
Idle Mode
305
Powerdown Mode
306
Enabling and Disabling Powerdown Mode
306
Entering Powerdown Mode
307
Exiting Powerdown Mode
307
Generating a Hardware Reset
307
Driving the V Pp Pin Low
307
Asserting the External Interrupt Signal
308
Selecting R and C
309
Once Mode
311
Reserved Test Modes
312
Interfacing with External Memory
314
External Memory Interface Signals and Registers
316
Chip Configuration Registers and Chip Configuration Bytes
320
Bus Width and Multiplexing
325
Timing Requirements for BUSWIDTH
328
16-Bit Bus Timings
329
8-Bit Bus Timings
331
Wait States (Ready Control)
332
Bus-Control Modes
336
Standard Bus-Control Mode
337
Write Strobe Mode
340
Address Valid Strobe Mode
342
Address Valid with Write Strobe Mode
345
System Bus Ac Timing Specifications
346
Explanation of AC Symbols
348
AC Timing Definitions
348
Programming the Nonvolatile Memory
352
Programming Methods
354
Otprom Memory Map
355
Security Features
356
Controlling Access to Internal Memory
356
Controlling Access to the OTPROM During Normal Operation
357
Controlling Access to the OTPROM During Programming Modes
357
Controlling Fetches from External Memory
359
Programming Pulse Width
361
Modified Quick-Pulse Algorithm
362
Programming Mode Pins
364
Entering Programming Modes
366
Selecting the Programming Mode
366
Power-Up and Power-Down Sequences
367
Power-Up Sequence
367
Power-Down Sequence
367
Slave Programming Mode
368
Reading the Signature Word and Programming Voltages
368
Slave Programming Circuit and Memory Map
369
Operating Environment
370
Slave Programming Routines
372
Timing Mnemonics
377
Auto Programming Mode
378
Auto Programming Circuit and Memory Map
378
Operating Environment
380
Auto Programming Routine
380
Auto Programming Procedure
382
ROM-Dump Mode
383
Pccb and Uprom Programming (8Xc196Mh Only)
383
Run-Time Programming
385

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