Intel 8XC196K Series User Manual page 309

8XC196K x , J x , CA USER'S MANUAL
CAN_CON (Continued)
(87C196CA)
Program the CAN control (CAN_CON) register to control write access to the bit timing registers, to
enable and disable CAN interrupts, and to control access to the CAN bus.
7
87C196CA —
Bit Bit
Number Mnemonic
1 IE
0 INIT
Figure 12-17. CAN Control (CAN_CON) Register (Continued)
12-30
CCE — —
Interrupt Enable
This bit globally enables and disables interrupts (error, status-change, and
message object transmit and receive interrupts).
1 = enable interrupts
0 = disable interrupts
When the IE bit is set, an interrupt is generated only if the corresponding
interrupt source's enable bit (EIE or SIE in CAN_CON; TXIE or RXIE in
CAN_MSG x _CON0) is also set. If the IE bit is clear, an interrupt request
updates the CAN interrupt pending register, but does not generate an
interrupt.
Software Initialization Enable
Address:
Reset State:
EIE SIE
Function
1E00H
01H
0
IE INIT