Intel 8XC196K Series User Manual page 195

Table of Contents

8XC196K x , J x , CA USER'S MANUAL

Clock (SC x pin)

Data (SD x pin)

Figure 8-7. Variable-width MSB in SSIO Transmissions

This condition exists only for the MSB. Once the MSB is clocked out, the

remaining bits are clocked out consistently at the programmed frequency.

One way to achieve a consistent MSB bit length is to start the down-count at a fixed time, using

these steps:

Clear SSIO_BAUD bit 7. This disables the baud-rate generator and clears the remaining

bits (BV6:0).

Write the byte to be transmitted to SSIOx_BUF.

Set the STE bit in SSIOx_CON. This enables transfers and drives the MSB onto the data

Disable interrupts.

Set the MSB of SSIO_BAUD and write the desired BAUD_VAL to the remaining bits.

This enables the baud-rate generator and starts the down count.

Rewrite the byte to be transmitted to SSIOx_BUF. This starts the transmission.

Enable interrupts.

Using this procedure starts the clock at a known point before each transmission, establishing a

predictable MSB bit time. Interrupts are disabled in step 4 and reenabled in step 7; otherwise, an

interrupt could cause a similar problem between steps 5 and 6.