Intel 8XC196K Series User Manual page 540

CAN_CON
(87C196CA)
Program the CAN control (CAN_CON) register to control write access to the bit timing registers, to
enable and disable CAN interrupts, and to control access to the CAN bus.
7
87C196CA —
Bit Bit
Number Mnemonic
7 —
6 CCE
5:4 —
3 EIE
2 SIE
CCE — —
Reserved; for compatibility with future devices, write zero to this bit.
Change Configuration Enable
This bit controls whether software can write to the bit timing registers.
1 = allow write access
0 = prohibit write access
Reserved; for compatibility with future devices, write zeros to these bits.
Error Interrupt Enable
This bit enables and disables the bus-off and warn interrupts.
1 = enable bus-off and warn interrupts
0 = disable bus-off and warn interrupts
Status-change Interrupt Enable
This bit enables and disables the successful reception (RXOK), successful
transmission (TXOK), and error code change (LEC2:0) interrupts.
1 = enable status-change interrupt
0 = disable status-change interrupt
When the SIE bit is set, the CAN controller generates a successful
reception (RXOK) interrupt request each time it receives a valid message,
even if no message object accepts it.
Address:
Reset State:
EIE SIE
Function
REGISTERS
CAN_CON
1E00H
01H
0
IE INIT
C-13