Enabling The Can Interrupts - Intel 8XC196K Series User Manual

12.6 ENABLING THE CAN INTERRUPTS

The CAN controller has a single interrupt input (INT13) to the interrupt controller. (Generally,
PTS interrupt service is not useful for the CAN controller because the PTS cannot readily deter-
mine the source of the CAN controller's multiplexed interrupts.) To enable the CAN controller's
interrupts, you must enable the interrupt source by setting the CAN bit in INT_MASK1 (see Ta-
ble 12-2 on page 12-3) and globally enable interrupt servicing (by executing the EI instruction).
In addition, you must set bits in the CAN control register (Figure 12-17) and the individual mes-
sage objects' control register 0 (Figure 12-18) to enable the individual interrupt sources within
the CAN controller.
CAN_CON
(87C196CA)
Program the CAN control (CAN_CON) register to control write access to the bit timing registers, to
enable and disable CAN interrupts, and to control access to the CAN bus.
7
87C196CA —
Bit Bit
Number Mnemonic
7 —
6 CCE
5:4 —
3 EIE
2 SIE
CAN SERIAL COMMUNICATIONS CONTROLLER
CCE —
Reserved; for compatibility with future devices, write zero to this bit.
Change Configuration Enable
Reserved; for compatibility with future devices, write zeros to these bits.
Error Interrupt Enable
This bit enables and disables the bus-off and warn interrupts.
1 = enable bus-off and warn interrupts
0 = disable bus-off and warn interrupts
Status-change Interrupt Enable
This bit enables and disables the successful reception (RXOK), successful
transmission (TXOK), and error code change (LEC2:0) interrupts.
1 = enable status-change interrupt
0 = disable status-change interrupt
When the SIE bit is set, the CAN controller generates a successful
reception (RXOK) interrupt request each time it receives a valid message,
even if no message object accepts it.
Figure 12-17. CAN Control (CAN_CON) Register
Reset State:
— EIE SIE
Function
Address: 1E00H
01H
0
IE INIT
12-29