Programming The Bit Timing 1 (Can_Btime1) Register - Intel 8XC196K Series User Manual

Table of Contents

8XC196K x , J x , CA USER'S MANUAL

12.4.3 Programming the Bit Timing 1 (CAN_BTIME1) Register

Bit timing register 1 (Figure 12-8) controls the time at which the bus is sampled and the number

of samples taken. In single-sample mode, the bus is sampled once and the value of that sample is

considered valid. In three-sample mode, the bus is sampled three times and the value of the ma-

jority of those samples is considered valid. Single-sample mode may achieve a faster transmis-

sion rate, but it is more susceptible to errors caused by noise on the CAN bus. Three-sample mode

is less susceptible to noise-related errors, but it may be slower. If you specify three-sample mode,

the hardware adds two time quanta to the TSEG1 value to allow time for two additional samples

Program the CAN bit timing 1 (CAN_BTIME1) register to define the sample time and the sample

mode. The CAN controller samples the bus during the last one (in single-sample mode) or three (in

three-sample mode) time quanta of t

Therefore, specifying the lengths of t

mission point.

Figure 12-8. CAN Bit Timing 1 (CAN_BTIME1) Register

, and initiates a transmission at the end of t

Sampling Mode

This bit determines how many samples are taken to determine a valid bit

1 = 3 samples, using majority logic

0 = 1 sample

Time Segment 2

This field determines the length of time that follows the sample point within

a bit time. Valid programmed values are 1–7; the hardware adds 1 to this

value. (Note 2)

Reset State:

defines both the sample point and the trans-