Programming The Capture/Compare Channels - Intel 8XC196K Series User Manual

8XC196K x , J x , CA USER'S MANUAL

10.5.3 Programming the Capture/Compare Channels

The EPAx_CON register controls the function of its assigned capture/compare channel. The reg-
isters for EPA0, EPA2, and EPA4–9 are identical. The registers for EPA1 and EPA3 have an ad-
ditional bit, the remap bit (RM), which is used to enable and disable remapping for high-speed
PWM generation (see "Generating a High-speed PWM Output" on page 10-16). This added bit
(bit 8) requires an additional byte, so EPA1_CON and EPA3_CON must be addressed as words,
while the others can be addressed as bytes.
To program a compare event, write to EPAx_CON (Figure 10-10) to configure the EPA cap-
ture/compare channel and then load the event time into EPAx_TIME. To program a capture event,
you need only write to EPAx_CON. Table 10-6 shows the effects of various combinations of
EPAx_CON bit settings.
Table 10-6. Example Control Register Settings and EPA Operations
TB CE MODE
7 6 5 4
X 0 0 0
X 0 0 1
X 0 1 0
X 0 1 1
X 0 X 1
X 0 1 X
X 0 0 1
X 0 1 0
TB CE MODE
7 6 5 4
X 1 0 0
X 1 0 1
X 1 1 0
X 1 1 1
X 1 X X
X 1 X X
X 1 X X
NOTES: — = bit is not used
X = bit may be used, but has no effect on the described operation. These bits cause other oper-
ations to occur.
10-20
Capture Mode
RE AD ROT ON/RT
3 2 1 0
— – — 0
— X X X
— X X X
— X X X
— X 1 X
— X 1 X
— 1 X X
— 1 X X
Compare Mode
RE AD ROT ON/RT
3 2 1 0
X — — 0
X X X X
X X X X
X X X X
X X 0 1
X X 1 1
X 1 X X
Operation
None
Capture on falling edges
Capture on rising edges
Capture on both edges
Capture on falling edge and reset opposite timer
Capture on rising edge and reset opposite timer
Start A/D conversion on falling edge
Start A/D conversion on rising edge
Operation
None
Clear output pin
Set output pin
Toggle output pin
Reset same timer
Reset opposite timer
Start A/D conversion