Configuring The Can Controller; Programming The Can Control (Can_Con) Register - Intel 8XC196K Series User Manual

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12.4 CONFIGURING THE CAN CONTROLLER

This section explains how to configure the CAN controller. Several registers combine to control

the configuration: the CAN control register, the two bit timing registers, and the three mask reg-

The CAN control register (Figure 12-6) controls write access to the bit timing registers, enables

and disables global interrupt sources (error, status change, and individual message object), and

controls access to the CAN bus.

Program the CAN control (CAN_CON) register to control write access to the bit timing registers, to

enable and disable CAN interrupts, and to control access to the CAN bus.

CAN SERIAL COMMUNICATIONS CONTROLLER

Reserved; for compatibility with future devices, write zero to this bit.

Change Configuration Enable

This bit controls whether software can write to the bit timing registers.

1 = allow write access

0 = prohibit write access

Reserved; for compatibility with future devices, write zeros to these bits.

Error Interrupt Enable

This bit enables and disables the bus-off and warn interrupts.

1 = enable bus-off and warn interrupts

0 = disable bus-off and warn interrupts

Status-change Interrupt Enable

This bit enables and disables the successful reception (RXOK), successful

transmission (TXOK), and error code change (LEC2:0) interrupts.

1 = enable status-change interrupt

0 = disable status-change interrupt

When the SIE bit is set, the CAN controller generates a successful

reception (RXOK) interrupt request each time it receives a valid message,

even if no message object accepts it.

Figure 12-6. CAN Control (CAN_CON) Register

Reset State: