Intel 8XC196K Series User Manual page 107

Table of Contents

8XC196K x , J x , CA USER'S MANUAL

The PTS select (PTSSEL) register selects either a PTS microcode routine or a standard interrupt

service routine for each interrupt requests. Setting a bit selects a PTS microcode routine; clearing a bit

selects a standard interrupt service routine. When PTSCOUNT reaches zero, hardware clears the

corresponding PTSSEL bit. The PTSSEL bit must be set manually to re-enable the PTS channel.

Setting this bit causes the corresponding interrupt to be handled by a PTS microcode

The PTS interrupt vector locations are as follows:

Bit Mnemonic Interrupt

PTS service is not recommended because the PTS cannot determine the source of

multiplexed interrupts.

Bit 13 is reserved on the 8XC196J x , K x devices and bits 6–8 are reserved on the 87C196CA,

8XC196J x devices. For compatibility with future devices, write zeros to these bits.

CAN Peripheral

SIO Transmit

SSIO 1 Transfer

SSIO 0 Transfer

Slave Port Command Buffer Full

Slave Port Input Buffer Full

Slave Port Output Buffer Empty

A/D Conversion Complete

EPA Capture/Compare Channel 0

EPA Capture/Compare Channel 1

EPA Capture/Compare Channel 2

EPA Capture/Compare Channel 3

Multiplexed EPA

Figure 5-4. PTS Select (PTSSEL) Register

Reset State: