Intel 8XC196K Series User Manual page 453

8XC196K x , J x , CA USER'S MANUAL
Mnemonic
DIVUB DIVIDE BYTES, UNSIGNED. This instruction
divides the contents of the destination word
operand by the contents of the source byte
operand, using unsigned arithmetic. It stores
the quotient into the low-order byte (i.e., the
byte with the lower address) of the
destination operand and the remainder into
the high-order byte. The following two
statements are performed concurrently.
(low byte DEST)
(high byte DEST)
Z
—
DJNZ DECREMENT AND JUMP IF NOT ZERO.
Decrements the value of the byte operand by
1. If the result is 0, control passes to the next
sequential instruction. If the result is not 0,
the instruction adds to the program counter
the offset between the end of this instruction
and the target label, effecting the jump. The
offset must be in the range of –128 to +127.
(COUNT)
if (COUNT)
←
PC
end_if
Z
—
DJNZW DECREMENT AND JUMP IF NOT ZERO
WORD. Decrements the value of the word
operand by 1. If the result is 0, control passes
to the next sequential instruction. If the result
is not 0, the instruction adds to the program
counter the offset between the end of this
instruction and the target label, effecting the
jump. The offset must be in the range of –128
to +127
(COUNT)
if (COUNT)
←
PC
end_if
Z
—
A-14
Table A-6. Instruction Set (Continued)
Operation
←
(DEST) / (SRC)
←
(DEST) MOD (SRC)
PSW Flag Settings
N C V VT
↑
— —
←
(COUNT) –1
≠
0 then
PC + 8-bit disp
PSW Flag Settings
N C V VT
— — — —
←
(COUNT) –1
≠
0 then
PC + 8-bit disp
PSW Flag Settings
N C V VT
— — — —
Instruction Format
DEST, SRC
DIVUB wreg, baop
(100111aa) (baop) (wreg)
ST
—
DJNZ breg,cadd
(11100000) (breg) (disp)
NOTE: The displacement (disp) is sign-
extended to 16 bits.
ST
—
DJNZW wreg,cadd
(11100001) (wreg) (disp)
NOTE: The displacement (disp) is sign-
extended to 16 bits.
ST
—