Intel 8XC196K Series User Manual page 164

Table 7-2. Serial Port Control and Status Registers (Continued)
Mnemonic Address
P2_DIR
P6_DIR
P2_MODE
P6_MODE
P2_PIN
P6_PIN
P2_REG
P6_REG
SBUF_RX
SBUF_TX
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Except as otherwise noted, write zeros to the reserved bits in these registers.
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The T1CLK pin is not implemented on the 8XC196CA, JQ, JR, JT, JV devices. XTAL1 must provide the
serial port clock.
1FCBH Port 2 Direction
This register selects the direction of each port 2 pin. Clear P2_DIR.1
to configure RXD (P2.1) as a high-impedance input/open-drain
output, and set P2_DIR.0 to configure TXD (P2.0) as a comple-
mentary output.
1FD2H Port 6 Direction
This register selects the direction of each port 6 pin. To use T1CLK
as the input clock to the baud-rate generator, clear P6_DIR.2.
1FC9H Port 2 Mode
This register selects either the general-purpose input/output function
or the peripheral function for each pin of port 2. Set P2_MODE.1:0
to configure TXD (P2.0) and RXD (P2.1) for the SIO port.
1FD1H Port 6 Mode
This register selects either the general-purpose input/output function
or the peripheral function for each pin of port 6. Set P6_MODE.2 to
configure T1CLK
1FCFH Port 2 Pin State
Two bits of this register contain the values of the TXD (P2.0) and
RXD (P2.1) pins. Read P2_PIN to determine the current value of the
pins.
1FD7H Port 6 Pin State
If you are using T1CLK (P6.2) as the clock source for the baud-rate
generator, you can read P6_PIN.2 to determine the current value of
††
T1CLK .
1FCDH Port 2 Output Data
This register holds data to be driven out on the pins of port 2. Set
P2_REG.1 for the RXD (P2.1) pin. Write the desired output data for
the TXD (P2.0) pin to P2_REG.0.
1FD5H Port 6 Output Data
This register holds data to be driven out on the pins of port 6. To use
T1CLK as the clock source for the baud-rate generator, set
P6_REG.2.
1FB8H Serial Port Receive Buffer
This register contains data received from the serial port.
1FBAH Serial Port Transmit Buffer
This register contains data that is ready for transmission. In modes
1, 2, and 3, writing to SBUF_TX starts a transmission. In mode 0,
writing to SBUF_TX starts a transmission only if the receiver is
disabled (SP_CON.3=0)
SERIAL I/O (SIO) PORT
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Description
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for the SIO port.
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7-3