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8XC196K x , J x , CA USER'S MANUAL
External
External
Clock Input
Clock Input
† Required if TTL driver is used. Not needed if CMOS driver is used.
† Required if TTL driver is used. Not needed if CMOS driver is used.
0.7 V
At power-on, the interaction between the internal amplifier and its feedback capacitance (i.e., the
Miller effect) may cause a load of up to 100 pF at the XTAL1 pin if the signal at XTAL1 is weak
(such as might be the case during start-up of the external oscillator). This situation will go away
when the XTAL1 input signal meets the V
these specifications are met, the XTAL1 pin capacitance will not exceed 20 pF.
13.5 RESETTING THE DEVICE
Reset forces the device into a known state. As soon as RESET# is asserted, the I/O pins, the con-
trol pins, and the registers are driven to their reset states. (Tables in Appendix B list the reset states
of the pins (see Table B-8 on page B-20 for the 8XC196Kx, Table B-9 on page B-21 for the
8XC196Jx, or Table B-10 on page B-22 for the 87C196CA). See Table C-2 on page C-2 for the
reset values of the SFRs.) The device remains in its reset state until RESET# is deasserted. When
RESET# is deasserted, the bus controller fetches the chip configuration bytes (CCBs), loads them
into the chip configuration registers (CCRs), and then fetches the first instruction.
13-8
V CC
V CC
4.7 kΩ †
4.7 kΩ †
Clock Driver
Clock Driver
No Connection
No Connection
Figure 13-5. External Clock Connections
T
XHXX
+ 0.5 V
CC
0.3 V
CC
Figure 13-6. External Clock Drive Waveforms
and V
IL
XTAL1
XTAL1
8XC196 Device
8XC196 Device
XTAL2
XTAL2
T
XLXH
0.7 V
CC
T
XLXX
– 0.5 V
0.3 V
– 0.5 V
CC
T
XLXL
specifications (listed in the datasheet). If
IH
A0274-02
A0274-02
T
XHXL
+ 0.5 V
A2119-02
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