Intel 8XC196K Series User Manual page 636

#, defined, 1-3, A-1
A
A/D converter, 2-11, 11-1–11-19
actual characteristic, 11-17
and port 0 reads, 11-14
and PTS, 5-26–5-31
block diagram, 11-1
calculating result, 11-9, 11-14
calculating series resistance, 11-11
characteristics, 11-16–11-19
conversion time, 11-6
determining status, 11-9
errors, 11-14–11-19
hardware considerations, 11-11–11-14
ideal characteristic, 11-16, 11-17
input circuit, suggested, 11-13
input protection devices, 11-13
interfacing with, 11-11–11-14
interpreting results, 11-9
interrupt, 5-28, 5-29, 5-31, 11-9
minimizing input source resistance, 11-12
overview, 11-3–11-4
programming, 11-4–11-9
sample delay, 11-3
sample time, 11-6
sample window, 11-3
SFRs, 11-2
signals, 11-2
starting with PTS, 5-26–5-31
successive approximation algorithm, 11-4
successive approximation register (SAR),
11-4
terminal-based characteristic, 11-19
threshold-detection modes, 11-6, 11-8
transfer function, 11-16–11-19
zero-offset adjustment, 11-3, 11-5
zero-offset error, 11-17
See also port 0
A/D scan mode‚ See PTS
Accumulator, RALU, 2-5
ACH0–ACH7, B-8
idle, powerdown, reset status, B-20
ACH2–ACH7
idle, powerdown, reset status, B-21, B-22
AD0–AD15, B-9
AD_COMMAND, 11-8, C-80
ADD instruction, A-2, A-7, A-42, A-43, A-48,
A-54
ADDB instruction, A-2, A-7, A-43, A-44, A-48,
A-54
ADDC instruction, A-2, A-7, A-45, A-48, A-54
ADDCB instruction, A-2, A-8, A-45, A-48, A-54
Address space
See memory partitions
Address/data bus, 2-6, 15-11, 15-17
AC timing specifications, 15-36–15-40
multiplexing, 15-8–15-14
Addressing modes, 3-5–3-6, A-6
AD_RESULT, 5-28, 11-6, 11-10, C-80
AD_TEST, 11-5, C-80
AD_TIME, 11-7, C-80
ADV#, B-9
AINC#, 16-12, B-9
ALE, 15-2, B-9
during bus hold, 15-17
idle, powerdown, reset status, B-20, B-21,
B-23
Analog-to-digital converter‚ See A/D converter
AND instruction, A-2, A-8, A-42, A-43, A-49,
A-55
ANDB instruction, A-2, A-8, A-9, A-43, A-44,
A-49, A-55
ANGND, 11-5, 13-1, B-9
ApBUILDER software, downloading, 1-10
Application notes, ordering, 1-6
Architecture
core block diagram, 2-3
device block diagram, 2-3
device comparison, 2-3
Arithmetic instructions, A-48, A-49, A-54, A-55
Assert, defined, 1-3
Auto programming mode, 16-26–16-29
algorithm, 16-29
circuit, 16-26–16-27
memory map, 16-28
PCCB, 16-28
security key programming, 16-30
INDEX
Index-1