Wait States (Ready Control) - Intel 8XC196K Series User Manual

8XC196K x , J x , CA USER'S MANUAL
XTAL1
CLKOUT
ALE
BUSWIDTH
Bus
AD15:8
Bus
Address
AD7:0
(Read)
RD#
INST
Bus
Address
AD7:0
(Write)
WR#

15.4 WAIT STATES (READY CONTROL)

An external device can use the READY input to request wait states in addition to the wait states
that are generated internally by the 87C196CA, 8XC196Jx, Kx device. When an address is placed
on the bus for an external bus cycle, the external device can pull the READY signal low to indi-
cate it is not ready. In response, the bus controller inserts wait states to lengthen the bus cycle until
the external device raises the READY signal. Each wait state adds one CLKOUT period (i.e., one
state time or 2T ) to the bus cycle.
OSC
15-14
Address Out
Low data in
Out
Low data out
Out
Figure 15-6. Timings for 8-bit Buses
Address Out
Address
High data in
+1 Out
Address
High data out
+1 Out
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