Intel 8XC196K Series User Manual page 607

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8XC196K x, J x , CA USER'S MANUAL
WSR
WSR
The window selection register (WSR) has two functions. One bit enables and disables the bus-hold
protocol. The remaining bits select windows. Windows map sections of RAM into the upper section of
the lower register file, in 32-, 64-, or 128-byte increments. PUSHA saves this register on the stack and
POPA restores it.
7
CA, J x
7
K x
HLDEN
Bit
Bit
Number
Mnemonic
7
HLDEN
6:0
W6:0
On the 87C196CA, 8XC196J x devices this bit is reserved; always write as zero.
Table C-24. WSR Settings and Direct Addresses for Windowable SFRs
Register Mnemonic
AD_COMMAND
AD_RESULT
AD_TEST
AD_TIME
CAN_BTIME0 (CA)
CAN_BTIME1 (CA)
Must be addressed as a word.
C-80
W6
W5
W6
W5
Hold Enable:
This bit enables and disables the bus-hold protocol (see Chapter 15,
"Enabling the Bus-hold Protocol (8XC196Kx Only)"). It has no effect on
windowing.
1 = bus-hold protocol enabled
0 = bus-hold protocol disabled
Window Selection:
These bits specify the window size and window number:
6 5 4 3 2 1 0
1 x x x x x x 32-byte window; W5:0 = window number
0 1 x x x x x 64-byte window; W4:0 = window number
0 0 1 x x x x 128-byte window; W3:0 = window number
32-Byte Windows
(00E0–00FFH)
Memory
Location
Direct
WSR
Address
1FACH
7DH
00ECH
1FAAH
7DH
00EAH
1FAEH
7DH
00EEH
1FAFH
7DH
00EFH
1E3FH
71H
00FFH
1E4FH
72H
00EFH
Reset State:
W4
W3
W2
W4
W3
W2
Function
64-Byte Windows
(00C0–00FFH)
Direct
WSR
Address
3EH
00ECH
3EH
00EAH
3EH
00EEH
3EH
00EFH
38H
00FFH
39H
00CFH
Address:
14H
00H
0
W1
W0
0
W1
W0
128-Byte Windows
(0080–00FFH)
Direct
WSR
Address
1FH
00ACH
1FH
00AAH
1FH
00AEH
1FH
00AFH
1CH
00BFH
1CH
00CFH

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