Intel 8XC196K Series User Manual page 313

8XC196K x , J x , CA USER'S MANUAL
If an individual message object caused the interrupt request (CAN_INT = 02–10H), software can
read the associated message object control 0 register (Figure 12-21). The INT_PND bit-pair will
be set, indicating that a receive or transmit interrupt request is pending
.
CAN_MSG x CON0
( n = 1–15)
Program the CAN message object x control 0 register (CAN_MSGxCON0) to indicate whether the
message object is ready to transmit and to control whether a successful transmission or reception
generates an interrupt. The most-significant bit-pair indicates whether an interrupt is pending.
This register consists of four bit-pairs — the most-significant bit of each pair is in true form and the
least-significant bit is in complement form. This format allows software to set or clear any bit with a
single write operation, without affecting the remaining bits.
7
MSGVAL MSGVAL
Bit Bit
Number Mnemonic
7:6 MSGVAL
5:4 TXIE
3:2 RXIE
1:0 INT_PND
Figure 12-21. CAN Message Object x Control 0 (CAN_MSG x CON0) Register
12-34
TXIE TXIE
Message Object Valid
Transmit Interrupt Enable
Receive Interrupt Enable
Interrupt Pending
This bit-pair indicates that the CAN peripheral has initiated a transmit (TX)
or receive (RX) interrupt. Software must clear this bit when it services the
interrupt.
01 = no interrupt
10 = an interrupt was generated
Address:
Reset State:
RXIE RXIE INT_PND
Function
1E x 0H ( x =1–F)
Unchanged
0
INT_PND