Reducing Power Consumption; Idle Mode - Intel 8XC196K Series User Manual

14.2 REDUCING POWER CONSUMPTION

Both power-saving modes conserve power by disabling portions of the internal clock circuitry
(Figure 14-1). The following paragraphs describe both modes in detail.
XTAL1
XTAL2
Figure 14-1. Clock Control During Power-saving Modes

14.3 IDLE MODE

In idle mode, the device's power consumption decreases to approximately 40% of normal con-
sumption. Internal logic holds the CPU clocks at logic zero, causing the CPU to stop executing
instructions. Neither the peripheral clocks nor CLKOUT are affected, so the special-function reg-
isters (SFRs) and register RAM retain their data and the peripherals and interrupt system remain
active. Tables in Appendix B list the values of the pins during idle mode (see Table B-8 on page
B-20 for the 8XC196Kx, Table B-9 on page B-21 for the 8XC196Jx, or Table B-10 on page B-22
for the 87C196CA).
Disable Clock Input
(Powerdown)
F
OSC
Divide-by-two
Circuit
Clock
Generators
Disable
Oscillator
(Powerdown)
SPECIAL OPERATING MODES
Disable Clocks
(Powerdown)
Peripheral Clocks (PH1, PH2)
CLKOUT
CPU Clocks (PH1, PH2)
Disable Clocks
(Idle, Powerdown)
A3064-02
14-3