Generating A High-Speed Pwm Output; Generating The Highest-Speed Pwm Output - Intel 8XC196K Series User Manual

8XC196K x , J x , CA USER'S MANUAL
The worst-case interrupt latency for a single-interrupt system with PTS service is 43 state times
(see "PTS Interrupt Latency" on page 5-10). The PTS cycle execution time in PWM toggle mode
is 15 state times (Table 5-4 on page 5-10). Therefore, a single capture/compare channel 0–3 can
be updated every 58 state times (43 + 15). Each PWM period requires two updates (one setting
and one clearing), so the execution time for a PWM period equals 116 state times. At 16 MHz,
the PWM period is 14.49 µs and the maximum PWM frequency is 68.97 kHz.
10.4.2.3

Generating a High-speed PWM Output

You can generate a high-speed, pulse-width modulated output with a pair of EPA channels and
the PTS set up in PWM remap mode. "PWM Remap Mode Example" on page 5-37 describes how
to configure the EPA and PTS. The remap bit (bit 8) must be set in EPA1_CON (to pair EPA0 and
EPA1) or EPA3_CON (to pair EPA2 and EPA3). One channel must be configured to set the out-
put; the other, to clear it. At the set (or clear) time, the PTS reads the old time value from
EPAx_TIME, adds to it the PWM period constant, and returns the new value to EPAx_TIME. Set
and clear times can be programmed to differ by as little as one timer count, resulting in very nar-
row pulses. Once started, this method requires no CPU intervention unless you need to change
the output frequency. The method uses a single timer/counter. The timer/counter is not interrupted
during this process, so other EPA channels can also use it if they do not reset it.
To determine the maximum, high-speed PWM frequency in your system, calculate your system's
worst-case interrupt latency and then double it. The worst-case interrupt latency is the total la-
tency of all the interrupts (both normal and PTS) used in your system. The following example
shows the calculations for a system that uses a pair of remapped EPA channels (i.e., EPA0 and 1
or EPA 3 and 4), two enabled interrupts, and PTS service. This example assumes that the PTS has
been initialized and that the duty cycle and frequency are fixed.
The worst-case interrupt latency for a single-interrupt system with PTS service is 43 state times
(see "PTS Interrupt Latency" on page 5-10). In this mode, the maximum period equals twice the
PTS latency. Therefore, the execution time for a PWM period equals 86 state times. At 16 MHz,
the PWM period is 10.75 µs and the maximum PWM frequency is 93 kHz.
10.4.2.4

Generating the Highest-speed PWM Output

You can generate a highest-speed, pulse-width modulated output with a pair of EPA channels and
a dedicated timer/counter. The first channel toggles the output when the timer value matches
EPAx_TIME, and at some later time, the second channel toggles the output again and resets the
timer/counter. This restarts the cycle. No interrupts are required, resulting in the highest possible
speed. Software must calculate and load the appropriate EPAx_TIME values and load them at the
correct time in the cycle in order to change the frequency or duty cycle.
10-16