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8XC196K x , J x , CA USER'S MANUAL
2.8
DESIGN CONSIDERATIONS FOR 8XC196JQ, JR, JT, AND JV DEVICES
The 8XC196Jx devices are 52-lead versions of 8XC196Kx devices. Some functions were re-
moved to reduce the pin count (Table 2-4).
Table 2-4. Unsupported Functions in 8XC196J x Devices
Removed Pins
P0.0 and P0.1
P1.4/EPA4, P1.5/EPA5, P1.6/EPA6, P1.7/EPA7
P2.3/BREQ, P2.5/HOLD#
P5.1/INST/SLPCS#
P5.4/SLPINT
P5.5/BHE#/WRH#
P5.6/READY
P5.7/BUSWIDTH
P6.2/T1CLK, P6.3/T1DIR
NMI
2-14
Unsupported Functions
Analog channels 0 and 1
Pins for EPA channels 4 through 7
Bus hold request and hold acknowledge
Instruction fetch indication and slave port
Slave port
16-bit external bus
Dynamic wait-state control
Dynamic buswidth selection
External clocking and direction control of timer 1
Nonmaskable interrupt
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