Intel 8XC196K Series User Manual page 135

8XC196K x , J x , CA USER'S MANUAL
PTS PWM Remap Mode Control Block (Continued)
Register Location
PTSCON PTSCB + 1
Figure 5-18. PTS Control Block – PWM Remap Mode (Continued)
Figure 5-19 shows the EPA and PTS operations for this example. The first timer match occurs at
t = 0 for EPA0, which sets the output and generates an interrupt.
PWM Remap Cycle 1. The PTS adds T2 to EPA0_TIME and toggles the TBIT.
The output remains set until the second timer match occurs at T1 for EPA1, which clears the out-
put and generates an interrupt.
PWM Remap Cycle 2. The PTS adds T2 to EPA1_TIME and toggles the TBIT.
Alternating EPA0 and EPA1 interrupts continue, with EPA0 setting the output and EPA1 clearing
it.
5-40
PTS Control Bits
M2:0 PTS Mode
These bits specify the PTS mode:
M2 M1 M0
0 1 0
TMOD Remap Mode Select
0 = PWM remap mode
TBIT Toggle Bit Initial Value
Determines the initial value of TBIT.
1 = selects initial value as one
0 = selects initial value as zero
The TBIT value determines whether PTSCONST1 or
PTSCONST2 is added to the PTSPTR1 value:
1 = PTSCONST2 is added to PTSPTR1
0 = PTSCONST1 is added to PTSPTR1
Reading this bit returns the current value of TBIT, which is
toggled by hardware at the end of each PWM remap cycle.
In PWM remap mode, the TBIT value is not used; PTSCONST1
is always added to the PTSPTR1 value. However, the unused
TBIT still toggles at the end of each PWM remap cycle.
Function
PWM