Intel 8XC196K Series User Manual page 585

8XC196K x, J x , CA USER'S MANUAL
PSW
PSW
The processor status word (PSW) actually consists of two bytes. The high byte is the status word,
which is described here; the low byte is the INT_MASK register. The status word contains one bit
(PSW.1) that globally enables or disables servicing of all maskable interrupts, one bit (PSW.2) that
enables or disables the peripheral transaction server (PTS), and six Boolean flags that reflect the
state of a user's program.
The status word portion of the PSW cannot be accessed directly. To access the status word, push the
value onto the stack (PUSHF), then pop the value to a register (POP test_reg ). The PUSHF and
PUSHA instructions save the PSW in the system stack and then clear it; POPF and POPA restore it.
15
Z N
7
Bit Bit
Number Mnemonic
7 Z
6 N
5 V
4 VT
3 C
C-58
V VT
See INT_MASK on page C-46
Zero Flag
This flag is set to indicate that the result of an operation is zero. For add-
with-carry and subtract-with-borrow operations, the flag is never set, but
it is cleared if the result is non-zero. This way, the zero flag indicates the
correct zero or non-zero result for multiple-precision calculations.
Negative Flag
This flag is set to indicate that the result of an operation is negative. The
flag is correct even if an overflow occurs. For all shift operations and the
NORML instruction, the flag is set to equal the most-significant bit of the
result, even if the shift count is zero.
Overflow Flag
This flag is set to indicate that the result of an operation is too large to be
represented correctly in the available space. For shift operations (SHL,
SHLB, and SHLL), the flag is set if the most-significant bit of the operand
changes during the shift.
Overflow-trap Flag
This flag is set when the overflow flag is set, but it is cleared only by the
CLRVT, JVT, and JNVT instructions. This allows testing for a possible
overflow condition at the end of a sequence of related arithmetic
operations, which is generally more efficient than testing the overflow
flag after each operation.
Carry Flag
This flag is set to indicate an arithmetic carry or the last bit shifted out of
an operand. It is cleared if a subtraction operation generates a borrow.
Normally, the result is rounded up if the carry flag is set. The sticky bit
flag allows a finer resolution in the rounding decision. (See the PSW flag
descriptions in Appendix A for details.)
C PSE
Function
no direct access
8
I ST
0