Intel 8XC196K Series User Manual page 642

special-purpose memory, 4-3, 16-2
Memory protection, 16-3–16-7
CCR security-lock bits, 16-18
UPROM security bits, 16-7
Memory space, See memory partitions
Memory, external, 15-1–15-40
interface signals, 15-1
See also address/data bus, bus controller,
bus-control modes, bus-control
signals, bus-hold protocol,
bus-width, BUSWIDTH, CCRs,
ready control, timing, wait states
Microcode engine, 2-4
Miller effect, 13-8
Mode 0
bus-timing mode, 15-32
SIO port mode, 7-5
Mode 1
bus-timing mode, 15-32
SIO port mode, 7-6
Mode 2
bus-timing mode, 15-33
SIO port mode, 7-6, 7-7, 7-8
Mode 3
bus-timing mode, 15-32
SIO port mode, 7-6, 7-7, 7-8
Modified quick-pulse algorithm, 16-10
MUL instruction, A-24, A-25, A-47, A-49, A-55
MULB instruction, A-25, A-47, A-49, A-55
Multiprocessor communications, 2-9, 2-10
methods, 2-10, 9-1
SIO port, 7-7, 7-8
slave port, 9-1
MULU instruction, A-3, A-25, A-26, A-43, A-47,
A-49, A-55
MULUB instruction, A-3, A-26, A-43, A-44,
A-49, A-55
N
Naming conventions, 1-3–1-4
NEG instruction, A-2, A-26, A-42, A-49, A-55
Negative (N) flag, A-4, A-5, A-18, A-19, A-20
NEGB instruction, A-2, A-27, A-42, A-49, A-55
NMI, 5-3, 5-4, 5-6, B-13
and bus-hold protocol, 15-20
hardware considerations, 5-6
idle, powerdown, reset status, B-20, B-23
Noise, reducing, 6-2, 6-3, 6-7, 11-3, 11-13, 11-14,
13-4, 13-5, 13-6
NOP instruction, 3-11, A-3, A-27, A-47, A-53,
A-59
two-byte‚ See SKIP instruction
NORML instruction, 3-4, A-3, A-27, A-42, A-53,
A-59
NOT instruction, A-2, A-27, A-42, A-49, A-55
Notational conventions, 1-3–1-4
NOTB instruction, A-2, A-28, A-42, A-49, A-55
Numbers, conventions, 1-4
O
OBF flag, 9-5, 9-14, 9-15
OFD bit, 16-8
ONCE mode, 2-11, 14-9
exiting, 14-9
Opcodes, A-42
EE, and unimplemented opcode interrupt,
A-3, A-47
FE, and signed multiply and divide, A-3
map, A-2
reserved, A-3, A-47
Operand types, See data types, 3-1
Operands, addressing, 3-10
Operating modes, 2-11–2-12
OR instruction, A-2, A-28, A-44, A-49, A-55
ORB instruction, A-2, A-28, A-44, A-49, A-55
Oscillator
and powerdown mode, 14-4
detecting failure, 13-9, 13-12
external crystal, 13-7
on-chip, 13-5
OTPROM
controlling access to internal memory,
16-4–16-6
controlling fetches from external memory,
16-6–16-7
enabling oscillator failure detection circuitry,
16-8
memory map, 16-2
programming, 16-1–16-45
See also programming modes
ROM-dump mode, 16-31
verifying, 16-31
Overflow (V) flag, A-4, A-5, A-21, A-22
Index-7