Intel Agilex User Manual
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Intel Agilex User Manual

Intel Agilex User Manual

Power management
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UG-20215 | 2019.04.02
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Summary of Contents for Intel Agilex

  • Page 1 ® ™ Intel Agilex Power Management User Guide Subscribe UG-20215 | 2019.04.02 Send Feedback Latest document on the web: HTML...

  • Page 2: Table Of Contents

    5.2. DSP and M20K Power Gating................. 26 5.3. Clock Gating....................... 26 5.4. Power Sense Line....................27 5.5. Power Optimization Techniques in the Intel Quartus Prime Software......27 6. Document Revision History for the Intel Agilex Power Management User Guide...28 ® ™ Intel...

  • Page 3: Intel ® Agilex ™ Power Management Overview

    Intel's standard warranty, but reserves the right to make changes to any products and services Registered at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

  • Page 4: Power Optimization

    The device configuration can be optimized to reduce power. This step involves the Intel Quartus Prime software power optimization wizard, the SmartVID feature (available in all Intel Agilex devices except for –4F speed grade), system cooling decisions, and/or dynamic workload management strategies. This phase may occur several times during the evolution of the system and device design.

  • Page 5: Intel Agilex Power Basics

    Intel's standard warranty, but reserves the right to make changes to any products and services Registered at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

  • Page 6: Early Power Estimator (Epe)

    2.3. Early Power Estimator (EPE) The EPE results for Intel Agilex devices are based on preliminary simulated data. Any results obtained while using this estimator are preliminary. The EPE for Intel Agilex devices provides a current and power estimate based on various typical conditions such as room temperature and nominal voltage.

  • Page 7: Power Analyzer

    2.4. Power Analyzer The Intel Quartus Prime Power Analyzer allows you to estimate power consumption for a post-fit design. To estimate power consumption before you compile the design, use the EPE.

  • Page 8: Intel Agilex Power And I/O State Sequencing

    Intel's standard warranty, but reserves the right to make changes to any products and services Registered at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
  • Page 9 Device Family Pin Connection Guidelines. All power rails must ramp up monotonically. The power-up sequence must meet the POR delay time. For the POR specifications of the Intel Agilex devices, refer to the POR Specifications section in the Intel Agilex Device Data Sheet.

  • Page 10: Power-On Reset

    The power-on reset (POR) circuitry keeps the Intel Agilex device in the reset state until the power supply outputs are within the recommended operating range. A POR event occurs when you power up the Intel Agilex device until all power supplies monitored by the POR circuitry reach the recommended operating range within the maximum power supply ramp time, t .

  • Page 11: Power Supplies Monitored By The Por Circuitry

    The Intel Agilex device is held in the POR state until all power supplies have passed their trigger point. After power supplies have passed the trigger point, the Secure Device Manager (SDM) will wait for a configurable delay time and then start device configuration.

  • Page 12: Intel Agilex Sensor Monitoring System

    Intel's standard warranty, but reserves the right to make changes to any products and services Registered at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

  • Page 13: Temperature Monitoring System

    While the Intel Agilex device is powered on and While the Intel Agilex device is powered on or configured 4.2.1. Local Temperature Sensor The Intel Agilex local temperature sensor uses a built-in 11-bit ADC and provides temperature readouts through the Temperature Sensor IP. ® ™...

  • Page 14: Remote Temperature Sensing Diode

    Temperature Sensor Channels and Locations on page 15 4.2.2. Remote Temperature Sensing Diode The Intel Agilex remote TSD interface allows you to monitor the temperature of the core fabric and transceiver tiles using an external temperature sensor. Figure 7. External Temperature Sensor Connection to the Intel Agilex Remote TSD The remote TSD requires a two-pins connection.

  • Page 15: Temperature Sensor Channels And Locations

    4. Intel Agilex Sensor Monitoring System UG-20215 | 2019.04.02 4.2.3. Temperature Sensor Channels and Locations The Intel Agilex local temperature sensors and remote TSDs are located in the core fabric and transceiver tiles. Figure 8. Locations of Intel Agilex Local Temperature Sensors and Remote TSDs- Preliminary The local temperature sensor channel names are preliminary.

  • Page 16: Intel Agilex Temperature Monitor Design Guidelines

    • Route both traces in equal lengths and shield them. • Intel recommends a 10-mils width and space for both traces. • Route both traces through the most minimum number of vias and crossunders possible to minimize the thermocouple effects.

  • Page 17: Intel Agilex Power Optimization Techniques And Features

    Intel's standard warranty, but reserves the right to make changes to any products and services Registered at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

  • Page 18: Smartvid Feature Implementation In Intel Agilex Devices

    When the SmartVID feature is used: 1. Intel Agilex devices are initially powered up to a nominal voltage level of the respective power grade for both V and V 2.

  • Page 19: Sdm Power Manager

    5. Intel Agilex Power Optimization Techniques and Features UG-20215 | 2019.04.02 5.1.2. SDM Power Manager In Intel Agilex devices, the SmartVID feature is managed by the SDM subsystem. The SDM subsystem is powered up after V and V voltage levels are powered up to 0.8V.
  • Page 20 MFR_ADC_CONTROL 5.1.2.2. PMBus Slave Mode Intel Agilex devices can also be configured in the PMBus slave mode with an external power management controller acting as the PMBus master. This is an optional command. This command is only applicable if you enable the PAGE command parameter.
  • Page 21 5. Intel Agilex Power Optimization Techniques and Features UG-20215 | 2019.04.02 When you configure the Intel Agilex device in the PMBus slave mode, you must connect an additional pin while connecting the existing PWRMGT_ALERT PWRMGT_SCL pins. PWRMGT_SDA Note: The PMBus slave mode only supports the 1.8-V single-ended I/O standard.
  • Page 22 X, is the calculated, real value in mV; • m, is the slope coefficient, a 2-byte two's complement integer; • Y, is the 2-byte two's complement integer received from the Intel Agilex device; • b, is the offset, a 2-byte two's complement integer; •...

  • Page 23: Temperature Compensation

    - 0) = 900 mV = 0.90 V 5.1.3. Temperature Compensation Intel Agilex devices are able to compensate for performance degradation at colder temperatures by raising the voltage. While raising the voltage increases the dynamic power consumption, the increase in dynamic power consumption is countered by lower leakage at cold temperatures, thus enabling total power consumption at cold temperatures to still be lower than at hot temperatures.

  • Page 24: Intel Agilex Power Management And Vid Implementation Guide

    Intel Agilex device is connected to the external voltage regulator through the PMBus interface. 5.1.4.1. Intel Agilex Power Management and VID Interface Getting Started The Intel Agilex Power Management and VID interface is installed as part of the Intel Quartus Prime software. 5.1.4.1.1. Specifying Power Management and VID Parameters and Options 1.
  • Page 25 5. Intel Agilex Power Optimization Techniques and Features UG-20215 | 2019.04.02 Parameters Value Description SDM_IO16 Disable this parameter for the non- SmartVID device. Intel recommends using the SDM_IO11 pin for this parameter. Use PWRMGT_ALERT output SDM_IO0 This is a required PMBus interface for...

  • Page 26: Dsp And M20K Power Gating

    You can perform dynamic power reduction by gating the clock signals of any circuitry not used by the design in the Intel Agilex devices. The sector clock gating is done at the multiplexer level.

  • Page 27: Power Sense Line

    For more details, refer to the Clock Gating section in the Intel Agilex Clocking and PLL User Guide.

  • Page 28: Document Revision History For The Intel Agilex Power Management User Guide

    Intel's standard warranty, but reserves the right to make changes to any products and services Registered at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

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