Timing Mnemonics - Intel 8XC196K Series User Manual

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Figure 16-11 shows the timings of the dump word command. PROG# governs when the device
drives the bus. The timings before the dump word command are the same as those shown in Fig-
ure 16-9. In the dump word mode, the AINC# pin can remain active and toggling. The PROG#
pin automatically increments the address.
RESET#
T SHLL
PBUS
ADDR/COMMAND
(Ports 3/4)
PALE#
PROG#
AINC#

16.8.5 Timing Mnemonics

Table 16-10 defines the timing mnemonics used in the program word and dump word waveforms.
The datasheets include timing specifications for these signals.
T
SHLL
T
LLLH
T
AVLL
T
LLAX
T
PLDV
T
PHDX
T
DVPL
T
PLDX
T
PLPH
T
PHLL
T
LHPL
T PLDV
T ILPL
Figure 16-11. Dump Word Waveform
Table 16-10. Timing Mnemonics
Mnemonic
Reset High to First PALE# Low.
PALE# Pulse Width.
Address Setup Time.
Address Hold Time.
PROG# Low to Word Dump Valid.
Word Dump Data Hold.
Data Setup Time.
Data Hold Time.
PROG# Pulse Width.
PROG# High to Next PALE# Low.
PALE# High to PROG# Low.
PROGRAMMING THE NONVOLATILE MEMORY
ADDR1
Word Dump
T PLDV
T PHDX
T PHPL
Description
ADDR2
Word Dump
T PHDX
A0122-02
16-25

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