Programming The Bit Timing 0 (Can_Btime0) Register - Intel 8XC196K Series User Manual

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12.4.2 Programming the Bit Timing 0 (CAN_BTIME0) Register

Bit timing register 0 (Figure 12-7) defines the length of one time quantum and the maximum
amount by which the sample point can be moved (t
lengthened) to compensate for resynchronization.
CAN_BTIME0
(87C196CA)
Program the CAN bit timing 0 (CAN_BTIME0) register to define the length of one time quantum and
the maximum number of time quanta by which a bit time can be modified for resynchronization.
7
87C196CA
SJW1
Bit
Bit
Number
Mnemonic
7:6
SJW1:0
5:0
BRP5:0
NOTE:
The CCE bit (CAN_CON.6) must be set to enable write access to this register.
Figure 12-7. CAN Bit Timing 0 (CAN_BTIME0) Register
CAN SERIAL COMMUNICATIONS CONTROLLER
SJW0
BRP5
BRP4
Synchronization Jump Width
This field defines the maximum number of time quanta by which a resyn-
chronization can modify t
3. The hardware adds 1 to the programmed value, so a "1" value causes
the CAN peripheral to add or subtract 2 time quanta, for example. This
adjustment has no effect on the total bit time; if t
t
is decreased by 2 tq, and vice versa.
2
TSEG
Baud-rate Prescaler
This field defines the length of one time quantum (tq), using the following
formula, where t
is the input clock period on XTAL1. Valid programmed
1
XTAL
values are 0–63.
×
(
tq
2t
BRP
1
=
+
XTAL1
For example, at 20 MHz operation, the system clock period is 50 ns.
Writing 3 to BRP achieves a time quanta of 400 ns; writing 1 to BRP
achieves a time quanta of 200 ns.
(
×
)
×
(
)
tq
=
2
50
3
+
1
(
×
)
×
(
)
tq
2
50
1
1
=
+
or t
can be shortened and the other
1
2
TSEG
TSEG
Reset State:
BRP3
BRP2
Function
and t
. Valid programmed values are 0–
1
2
TSEG
TSEG
TSEG
)
=
400 ns
200 ns
=
Address:
1E3FH
Unchanged
0
BRP1
BRP0
is increased by 2 tq,
1
12-15

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