Intel 8XC196K Series User Manual page 640

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A/D threshold voltage, 11-6
A/D voltage drop, 11-12
capacitor size (powerdown circuit), 14-8
programming voltage, 16-16
PWM duty cycle, 5-32
PWM frequency, 5-32
SIO baud rate, 7-11, C-68
FPAL-96, 3-4
Frequency
external crystal, 16-32
SSIO port baud-rate generator, 8-9
G
GO command, RISM, 16-35
H
Handbooks, ordering, 1-6
Handshaking
SSIO, 8-6
Hardware
A/D converter considerations, 11-11–11-14
addressing modes, 3-5
auto programming circuit, 16-27
clock sources, 13-5
device considerations, 13-1–13-12
device reset, 13-8, 13-10, 13-11, 13-12
interrupt processor, 2-6, 5-1
memory protection, 16-7, 16-18
minimum configuration, 13-1
NMI considerations, 5-6
noise protection, 13-4
oscillator failure detection, 16-8
pin reset status, B-20, B-21, B-22
programming mode requirements, 16-14
reset instruction, 3-11
serial port programming circuit, 16-33
SIO port considerations, 7-7
slave port connections, 9-6–9-7
slave programming circuit, 16-17
UPROM considerations, 16-7
HLDA#, 15-3, 15-17, B-12
HLDA# considerations, 6-13
HLDEN bit, 15-19
Hold latency, See bus-hold protocol
HOLD#, 15-3, 15-17, B-12
HOLD# considerations, 6-12
Hypertext manuals and datasheets, downloading,
1-10
I
I/O ports
unused inputs, 13-2
I/O ports‚ See ports‚ SIO port‚ SSIO port
IBE flag, 9-5, 9-14, 9-15
IBSP196, 16-32
Idle mode, 2-12, 13-12, 14-3–14-4
entering, 14-4
exiting, 14-4
pin status, B-20, B-21, B-22
timeout control, 10-7
IDLPD #1, 14-4
IDLPD #2, 14-5
IDLPD instruction, A-2, A-16, A-47, A-53, A-59
illegal operand, 13-9, 13-12
Immediate addressing, 3-6
INC instruction, A-2, A-16, A-42, A-48, A-54
INCB instruction, A-2, A-17, A-42, A-48, A-54
Indexed addressing, 3-9
and register RAM, 4-12
and windows, 4-23
Indirect addressing, 3-6
and register RAM, 4-12
with autoincrement, 3-7
Input pins
level-sensitive, B-8
sampled, B-8
INST, 15-3
idle, powerdown, reset status, B-20
Instruction set, 3-1
and PSW flags, A-5
code execution, 2-5, 2-6
conventions, 1-3
execution times, A-54–A-55
lengths, A-48–A-54
opcode map, A-2–A-3
opcodes, A-42–A-47
overview, 3-1–3-4
protected instructions, 5-8
reference, A-1–A-3
See also RISM
INTEGER, defined, 3-3
Interrupts, 5-1–5-41
and bus-hold, See bus-hold protocol
Index-5

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