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3.4
Always on Periodic Timer (AONPT) Spurious Interrupt
There is a chance that after a warm reset occurs, the PIC IRR register may be asserted
by the application. In this situation, the BootROM registers an interrupt service routine
(ISR) with the AONPT to catch this situation where the application would not have had a
chance to register its own ISR. This code is handled in the following function:
aon_handle_spurious_irq();
3.5
Setting the OTP Bit to Lock the BootROM
The BootROM may be locked to avoid accidental erasure by setting bit 0 of flash
memory location 0 to zero. Once done, the BootROM memory cannot be erased,
overwritten, or even read from. This is a security feature.
8KB OTP supports a hardware lock mechanism to prevent writes to and erases of OTP.
If bit 0 of offset 0x0 of the information memory region of Flash is 0b, the OTP region is
considered programmed, and hardware blocks all writes to and erases of information
memory.
To write to this address, add the following code to the rom_startup.c file:
<install_dir>/firmware/bsp/1.X/soc/quark_d2000/rom
rom_startup.c
Include qm_flash.h to enable flash access functions.
#include "qm_flash.h"
In the rom_startup function, add the following line of code:
qm_flash_word_write(QM_FLASH_0, QM_FLASH_REGION_OTP, 0, 0);
3.6
Building and Flashing the ROM
For full instructions on building and flashing the ROM from the command line, refer to
https://github.com/01org/qmsi.
Intel® Quark™ Microcontroller D2000 BootROM
User Guide
10
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Document Number: 334476-001EN
May 2016
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