Long-Indexed Addressing; Zero-Indexed Addressing - Intel 8XC196K Series User Manual

8XC196K x , J x , CA USER'S MANUAL
The instruction LD AX,12[BX] loads AX with the contents of the memory location that resides
at address BX+12. That is, the instruction adds the constant 12 (the offset) to the contents of BX
(the base address), then loads AX with the contents of the resulting address. For example, if BX
contains 1000H, then AX is loaded with the contents of location 1012H. Short-indexed address-
ing is typically used to access elements in a structure, where BX contains the base address of the
structure and the constant (12 in this example) is the offset of a specific element in a structure.
You can also use the stack pointer in a short-indexed instruction to access a particular location
within the stack, as shown in the following instruction.
LD AX,2[SP]
3.2.4.2

Long-indexed Addressing

In a long-indexed instruction, you specify the base address as a 16-bit variable and the offset as
an indirect address register (a WORD). The following instructions use long-indexed addressing.
LD AX,TABLE[BX]
AND AX,BX,TABLE[CX]
ST AX,TABLE[BX]
ADDB AL,BL,LOOKUP[CX]
The instruction LD AX, TABLE[BX] loads AX with the contents of the memory location that re-
sides at address TABLE+BX. That is, the instruction adds the contents of BX (the offset) to the
constant TABLE (the base address), then loads AX with the contents of the resulting address. For
example, if TABLE equals 4000H and BX contains 12H, then AX is loaded with the contents of
location 4012H. Long-indexed addressing is typically used to access elements in a table, where
TABLE is a constant that is the base address of the structure and BX is the scaled offset (n × el-
ement size, in bytes) into the structure.
3.2.4.3

Zero-indexed Addressing

In a zero-indexed instruction, you specify the address as a 16-bit variable; the offset is zero, and
you can express it in one of three ways: [0], [ZERO_REG], or nothing. Each of the following load
instructions loads AX with the contents of the variable THISVAR.
LD AX,THISVAR[0]
LD AX,THISVAR[ZERO_REG]
LD AX,THISVAR
The following instructions also use zero-indexed addressing:
ADD AX,1234[ZERO_REG]
POP 5678[ZERO_REG]
3-8
; AX ← MEM_WORD(TABLE+BX)
; AX ← BX AND MEM_WORD(TABLE+CX)
; MEM_WORD(TABLE+BX) ← AX
; AL ← BL + MEM_BYTE(LOOKUP+CX)
; AX ← AX + MEM_WORD(1234)
; MEM_WORD(5678) ← MEM_WORD(SP)
; SP ← SP + 2