Intel 8XC196K Series User Manual page 516

Name Type
P6.7:0 I/O
PACT# O
PALE# I
PBUS.15:0 I/O
PMODE.3:0 I
PROG# I
†
This signal is not implemented on the 8XC196J x or 87C196CA (see "Design Considerations for
8XC196JQ, JR, JT, and JV Devices" on page 2-14 or "Design Considerations for 87C196CA Devices" on
page 2-13).
††
This signal is not implemented on the 8XC196J x (see "Design Considerations for 8XC196JQ, JR, JT, and
JV Devices" on page 2-14).
Table B-6. Signal Descriptions (Continued)
Port 6
This is a standard 8-bit bidirectional port.
Port 6 is multiplexed as follows: P6.0/EPA8/COMP0, P6.1/EPA9/COMP1,
P6.2/T1CLK, P6.3/T1DIR, P6.4/SC0, P6.5/SD0, P6.6/SC1, and P6.7/SD1.
P6.2 and P6.3 are not implemented on the 8XC196J x and 87C196CA.
Programming Active
During auto programming or ROM-dump, a low signal indicates that
programming or dumping is in progress, while a high signal indicates that the
operation is complete.
PACT# is multiplexed with P2.7 and CLKOUT.
Programming ALE
During slave programming, a falling edge causes the device to read a
command and address from the PBUS.
PALE# is multiplexed with P2.1 and RXD.
Address/Command/Data Bus
During slave programming, ports 3 and 4 serve as a bidirectional port with
open-drain outputs to pass commands, addresses, and data to or from the
device. Slave programming requires external pull-up resistors.
During auto programming and ROM-dump, ports 3 and 4 serve as a regular
system bus to access external memory. P4.6 and P4.7 are left unconnected;
P1.1 and P1.2 serve as the upper address lines.
Slave programming:
PBUS.7:0 are multiplexed with AD7:0, SLP7:0 (K x only), and P3.7:0.
PBUS.15:8 are multiplexed with AD15:8 and P4.7:0.
Auto programming:
PBUS.7:0 are multiplexed with AD7:0, SLP7:0 (K x only), and P3.7:0.
PBUS.13:8 are multiplexed with AD13:8 and P4.5:0; PBUS15:14 are
multiplexed with P1.2:1.
Programming Mode Select
Determines the programming mode. PMODE is sampled after a device reset
and must be static while the part is operating. (Table 16-7 on page 16-14 lists
the PMODE values and programming modes.)
PMODE.3:0 are multiplexed with P0.7:4 and ACH7:4.
Programming Start
During programming, a falling edge latches data on the PBUS and begins
programming, while a rising edge ends programming. The current location is
programmed with the same data as long as PROG# remains asserted, so the
data on the PBUS must remain stable while PROG# is active.
During a word dump, a falling edge causes the contents of an OTPROM
location to be output on the PBUS, while a rising edge ends the data transfer.
PROG# is multiplexed with P2.2 and EXTINT.
SIGNAL DESCRIPTIONS
Description
B-15