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8XC196K x , J x , CA USER'S MANUAL
4.1.6
Internal RAM (Code RAM)
These devices have up to 512 bytes of internal RAM (see Table 4-1 on page 4-2 for details) be-
ginning at location 0400H. Although it is sometimes called code RAM to distinguish it from reg-
ister RAM, this internal RAM can store either executable code or data. The code RAM is accessed
through the memory controller, so code executes as it would from external memory with zero wait
states. Data stored in this area must be accessed with indirect or indexed addressing, so data ac-
cesses to this area take longer than data accesses to the register RAM. The code RAM cannot be
windowed.
4.1.7
Register File
The register file (Figure 4-1) is divided into an upper register file and a lower register file. The
upper register file consists of general-purpose register RAM. The lower register file contains gen-
eral-purpose register RAM along with the stack pointer (SP) and the CPU special-function regis-
ters (SFRs).
Table 4-1 on page 4-2 lists the register file memory addresses. The RALU accesses the lower reg-
ister file directly, without the use of the memory controller. It also accesses a windowed location
directly (see "Windowing" on page 4-13). The upper register file and the peripheral SFRs can be
windowed. The 8XC196JV has additional register RAM in locations 1C00–1DFFH. Like the
general-purpose register RAM in the upper register file, this register RAM can be windowed and
is accessed directly, without the use of the memory controller. Registers in the lower register file
and registers being windowed can be accessed with register-direct addressing.
The register file must not contain code. An attempt to execute an instruction
from a location in the register file causes the memory controller to fetch the
instruction from external memory.
4-10
NOTE
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