Table of Contents
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Table
14-4
Test-mode-entry Pins ...............................................................................................14-10
15-1
External Memory Interface Signals.............................................................................15-1
15-2
READY Signal Timing Definitions.............................................................................15-16
15-3
HOLD#, HLDA# Timing Definitions ..........................................................................15-18
15-4
Maximum Hold Latency ............................................................................................15-19
15-5
Bus-control Mode .....................................................................................................15-20
15-6
Modes 0, 1, 2, and 3 Timing Comparisons...............................................................15-32
15-7
AC Timing Symbol Definitions ..................................................................................15-37
15-8
AC Timing Definitions ...............................................................................................15-37
16-1
OTPROM Sizes for 87C196K x, J x, CA Devices.........................................................16-1
87C196K x OTPROM Memory Map ...........................................................................16-3
16-2
16-3
Memory Protection for Normal Operating Mode.........................................................16-4
16-4
Memory Protection Options for Programming Modes ................................................16-5
16-5
UPROM Programming Values and Locations for Slave Mode ...................................16-8
16-6
Pin Descriptions .......................................................................................................16-11
16-7
PMODE Values ........................................................................................................16-14
16-8
Device Signature Word and Programming Voltages ................................................16-16
16-9
Slave Programming Mode Memory Map ..................................................................16-18
16-10
Timing Mnemonics ...................................................................................................16-25
16-11
Auto Programming Memory Map..............................................................................16-28
16-12
Serial Port Programming Mode Memory Map ..........................................................16-34
16-13
Serial Port Programming Default Values and Locations ..........................................16-35
16-14
User Program Register Values and Test ROM Locations ........................................16-35
16-15
RISM Command Descriptions ..................................................................................16-36
A-1
Opcode Map (Left Half) ............................................................................................... A-2
A-1
Opcode Map (Right Half)............................................................................................. A-3
A-2
Processor Status Word (PSW) Flags .......................................................................... A-4
A-3
Effect of PSW Flags or Specified Bits on Conditional Jump Instructions .................... A-5
A-4
PSW Flag Setting Symbols ......................................................................................... A-5
A-5
Operand Variables ...................................................................................................... A-6
A-6
Instruction Set ............................................................................................................. A-7
A-7
Instruction Opcodes .................................................................................................. A-42
A-8
Instruction Lengths and Hexadecimal Opcodes ........................................................ A-48
A-9
Instruction Execution Times (in State Times) ............................................................ A-54
B-1
Signal Name Changes ................................................................................................ B-1
B-2
8XC196K x Signals Arranged by Functional Categories .............................................. B-2
B-3
8XC196J x Signals Arranged by Functional Categories............................................... B-4
B-4
87C196CA Signals Arranged by Functional Categories.............................................. B-6
B-5
Description of Columns of Table B-6........................................................................... B-8
B-6
Signal Descriptions...................................................................................................... B-8
B-7
Definition of Status Symbols ..................................................................................... B-19
B-8
8XC196K x Pin Status ................................................................................................ B-20
B-9
8XC196J x Pin Status ................................................................................................ B-21
B-10
87C196CA Pin Status ............................................................................................... B-22
TABLES
CONTENTS
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